Technical differences between ARM (RISC) and x86 (CISC)

This family of friends, such as reduced-to-CISC, has been entangled since its birth. Today, after years of development, both of them have opened up a world in their respective fields and interacted with each other. With its focus on high performance, high-performance power consumption ratio, small size, and mobile devices, CISC focuses on desktop, high performance, and the civil market. Now, the representatives of the World-class computer science and technology are arm, while the representatives of CISC are x86, which we are familiar. So where are their technical differences? What is the difference between the two technologies?

Instruction Set appearance

To be clear about the differences between the world's popular arm and x86, we have to push the time forward and observe some things at the beginning of the computer, in order to clearly understand the relationship between the instruction set, simplification, and complexity.

 

Machine language instance
Machine language	Description
000000010000	Represents load A, 16
000000000001	Load B, 1
000000010000	Represents store B, 16
000000000001	Represents store B, 1

 

It is so happy for students to study computer today! Today, there are a lot of visual operations, mature programming languages that are close to natural languages, and there are also a lot of well-written libraries used to complete those fixed and complex tasks. The learning and use of this "happy" computer should not be difficult at all-please note that it is really much better than the computer users in the 1970s S.

Traditional computers use tapes for input and output, which is extremely inefficient.

In the late 1970s S, the emergence of computers brought about various conveniences, but also brought about various inconveniences. First, programming. At that time, there was no advanced programming language similar to today's, similar to the natural language, and various logics were very well-developed. Instead, the language was used to write commands.

Machine language and later assembly language are both difficult to use, have poor readability, and are difficult to maintain. In addition, the most important thing is that these languages are "stupid". If you want to calculate some slightly complex operations, such as multiplication, division, trigonometric function, calculus, and equations, every computation requires re-programming (in the era of punching input data on tapes, there is no convenient function of "pasting + copying ).

As a result, people think of a method to write a set of standard programs for some commonly used commands, such as integration, differentiation, multiplication and division, and leave an interface for input data. This can greatly reduce the difficulty in programming, improve programming efficiency and increase its ease of use. As soon as this idea was put forward, it was recognized by many people in the industry. Everyone gave this idea a name called "Instruction Set ".

The Instruction Set contains a large number of basic operations and is formulated and modularized for use by people. For software, the emergence of instruction sets undoubtedly greatly improves the efficiency of programming. At the same time, due to the existence of modular commands, the software operation efficiency has also been improved. For hardware, the efficiency of dedicated modules is always higher than that of general modules. Therefore, the emergence of instruction sets opens a new door for improving the performance of CPU hardware.

Complicated or streamlined?

After the birth of instruction sets, CPU vendors began to organize and standardize these instruction sets, including Intel. Intel, among its most successful 8086 processor, began to add a large number of instruction sets to improve computing efficiency and improve CPU performance. At the same time, another idea is quietly emerging.

Intel has to use the x86 CISC instruction set to ensure compatibility with 8086 processors.

There is a famous "8020 Theorem" in the industry that can be applied in many aspects: for example, 80% of employees in a company are common employees, and 20% of talents may become leaders; 80% of what leaders do every day is not urgent or important. 20% is the most urgent and important content. "8020 Theorem" summarizes most of the content of social development. Although it is not so precise, it is enough to indicate that most of the content is often inefficient, the most important part is the core part of 20%-for example, the following section:

The CPU instruction set is a collection of various functions. The reason for the birth of instruction sets is that people are eager to be more efficient when writing software, and also meet the needs of standardization and modularization in the Development of things. However, in all the instruction sets, after analysis and statistics, only 20% of the instruction sets are used in 80% of the cases, and most of the 80% instruction sets are only 20% of the cases.

The efficiency of the RISC processor is very high. Generally, the energy consumption ratio is very good, but the instruction is complicated, especially the large size of the program. The figure shows the IBM Power 7 processor interface, which is a classic high-performance RISC processor.

The meaning here is very clear. If a CPU supports all instruction sets, 20% of them are frequently called, and 80% of them are often idle, at least 80% of the time. In the era when the CPU transistor was "golden", this was a serious waste of transistors. In this case, Professor John hennesi, a former principal of Stanford University, a Fellow of the American Emy of sciences, the College of Engineering and the three schools of arts and sciences, and David Paterson, a computer professor at UC Berkeley, A simpler instruction set, called a simplified instruction set, is proposed. It is short for CED instruction set computing, which is short for "RISC. The traditional large and complete Instruction Set has also been assigned a formal name, called Complex Instruction Set Computing, or CISC.

The advantage of Proteus is that it improves the number of commands and addressing methods, greatly reducing the design difficulty, the compiler is more efficient, and the parallel execution of commands is higher. At the same time, the CPU size is smaller, the energy consumption is lower, and the performance power consumption ratio is higher. However, there is no disadvantage in the process. For example, the CPU of a replica set has a higher computing efficiency for a commonly used Instruction Set of 20%, but for some infrequently used or complex instructions, the computing efficiency is significantly reduced by combining several common commands. For the software, the size of the server-side CPU is larger than that of the CISC, And the complexity is slightly higher. In addition, because the instruction set is simplified, the performance of the earlier stage of the CPU is obviously inferior to that of the CISC in the same period, although it is smaller and consumes less power.

Today's CPU: x86 and arm

In terms of principle, the well water is not a waste of water. But in the process of development, both of them learn from each other, and each has its own income.

For CISC, the instruction set itself will certainly become more and more as computing requirements continue to develop. As CISC continues to develop, the number of transistors in its actual CPU products will not be able to suppress the increase, and the performance and power consumption ratio and cost performance will be difficult to satisfy. From the design point of view, the length of the CISC instruction set is not fixed, the execution time is not fixed, and the design is much more difficult. It is difficult to find an efficient general design path to complete the instruction execution. In addition, cache becomes more and more important due to the speed gap between the CISC processor and the memory. This also means that the CPU itself needs to be more streamlined and efficient, and the Space saved must be used to accommodate more and more important cache levels.

In order to solve these problems, the modern CISC processor began to seriously learn the concept of the RISC. The problem with CISC is that the instruction set is complex and changeable, and it is obviously impossible to develop dedicated hardware optimization for each instruction. So, can I change my mind? Selecting and optimizing the most commonly used instruction sets can greatly improve the efficiency, then we can use a combination of several basic commands to complete the process-this is what we think of using the principle of "back-to-Earth. What is different is that the concept is completed at the command level by the Proteus, while the CISC implements the idea at the hardware level.

Intel's nehalem processor can be described as x86 designed with reference to the concept of "reduced.

Take Intel's nehalem or AMD's K10 processor as an example. First, these x86 processors use "micro commands ". The so-called micro-commands are some basic commands. Most of the CISC commands can be split into several simple and fixed micro-commands. Second, the CPU has designed a "Translation Unit", which is generally executed by the decoding unit. During running, the CPU accepts an x86 command, and the decoding unit disassembles the complicated x86 command into one or more micro commands. For example, nehalem has designed three simple decoding units and one complex decoding unit, which can split the x86 Instruction Decoding into 1 ~ 4 micro commands.

Third, the CPU will make adequate Optimization for these micro-commands, so that the execution efficiency and speed can reach a satisfactory level. Of course, not all x86 commands are treated equally during decoding. Commands that are most commonly used, such as mov, push, call, CMP, and add, are processed with priority, priority, and acceleration. commands that are not commonly used are either split into Common commands, either go to the normal loop for processing. Although efficiency has an impact, this design is acceptable considering its low probability of use. How to execute x86 commands more efficiently and efficiently during microinstruction decoding and processing; how to express and run micro commands; the relationship between micro-commands and x86 commands and which micro-commands are the most common and preferred commands have become the core content that most affects CPU performance.

Future arm cortex A-50 is a representative of High Performance processors.

With the adoption of the concept of the reduced-level CPU and the innovative design of the x86 processor, today's CISC processor can basically solve the problems of complicated CISC instructions, large volume, and high transistor consumption. For the vendor, the decoding and assembly line core of a well-designed x86 processor can maintain the development of the several generations without falling behind. During the development process, manufacturers can constantly adjust and provision the designed core, and modify the cache and bus configuration to achieve better performance.

CISC has learned from the concept of a new world, and has created itself. In contrast, some of them are also useful for CISC, but not too many. It is simple, relatively fixed, and fast to process. In terms of design, we can even use a longer pipeline to achieve high frequencies and ultimately achieve better performance. However, the main problem with the Proteus is that the instruction set is simple. Therefore, when processing complex applications, it takes more time to read the total number of commands that need to be read from the memory, in some cases, poor performance is also a hard injury to the back-to-back. As a result, in the development of the server guard, the server guard is gradually injecting the CISC idea into the server guard. For example, add new instruction sets to keep up with the times, further optimize the internal architecture, and change the running cycle to an unfixed cycle. Since the development of the world-class computer science and technology, the number of commands has increased and the number of important performance indicators, such as floating point computing, has increased. Taking arm as an example, we will not only gradually improve the floating point computing performance, add special floating point commands, but also plan to develop a high-performance ARM processor based on the existing one, in order to enhance the ability to cope with market changes in the future, especially the competition for x86 processors.

Future processors provide lower power consumption and higher performance

From the perspective of the current CPU development, whether it is arm or x86, whether it is CISC or RISC, in addition to striving to consolidate its own performance advantages and enhance the performance of the product, we also actively learn from each other's product characteristics and hope to make breakthroughs. However, in any case, the CPU will certainly develop towards high performance and low power consumption in the future. At present, the tide of mobile computing is approaching, and competition is becoming increasingly fierce. But in the end, it is the competition for performance-to-power ratio. Whoever can provide high performance at low power consumption will have hope for success. In the future, processor power consumption will be lower and performance will be higher.

 

 

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From http://www.mcplive.cn/index.php/article/index/id/12476

Technical differences between ARM (RISC) and x86 (CISC)