The first section of compilation learning

The difference between the assembly instruction and the machine instruction is in the representation method of the instruction. Assembly instruction is a written form of machine instruction that is easy to remember.

Assembly instructions are mnemonics for machine instructions.

Register: A device in the CPU that can store data, with multiple registers in one CPU.

AX BX is the code name of the register.

Assembly language consists of the following three parts:

1. Assembly instructions (mnemonic for machine code)

2. Pseudo-directive (executed by compiler)

3. Other symbols (identified by the compiler)

CPU we need to provide instructions and data to the CPU before it can work.

Instructions and data are stored in memory, i.e. memory.

In memory, instructions and data are not different, they are binary information.

The memory is divided into a number of storage units, numbered sequentially from 0 onwards.

To read and write data, the CPU needs to interact with external memory for three types of information:

1. Address of the storage unit (address information)

2. Device selection, read and write command selection (control information)

3. Read or write Data

So there are three kinds of buses in the computer, which are logically divided into address bus, data bus and control bus.

A CPU has n root address bus, we can say that its width is n, it can address: 2 of the N-th square of the internal deposit cells.

The data bus width of the CPU determines its data transfer speed with the outside world.

The end of the program is the CPU, we use the assembly programming, we have to consider from the CPU point of view.

A typical CPU consists of an operator, a controller, and a register, which are internally connected via a bus.

Data register of 4: AX,BX,CX,DX;

Address pointer Register of 2: SP,BP;

Variable address register 2: Si,di;

Segment Register of 4: cs,ds,ss,es;

Control register of two: Ip,flags.

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The 8086 CPU has a total of 14 registers and is all 16 bits.

That is, a total of 14 ax,bx,cx,dx,sp,bp,si,di,ip,flag,cs,ds,ss,es.

These 14 registers are divided into general registers, control registers and segment registers in a certain way.

Universal Registers:

AX,BX,CX,DX is called a data register:

AX (ACCUMULATOR): Cumulative register, also known as accumulator;

BX (Base): Base address register;

CX (Count): Counter register;

DX (data): Information register;

SP and BP are also known as pointer registers:

SP (Stack Pointer): stack pointer register;

BP (base Pointer): base pointer register;

SI and DI are also known as the variable address registers:

SI (source Index): source variable address register;

DI (Destination Index): Destination variable address register;

Control Register:

IP (instruction Pointer): instruction pointer register;

Flag: Sign Register;

Segment Register:

CS (Code Segment): Snippet register;

DS (Data Segment): segment register;

SS (Stack Segment): stack segment register;

ES (Extra Segment): additional segment register;

, each 16-bit register can be used as a 2 independent 8-bit register.

AX registers can be divided into two independent 8-bit AH and AL registers;

BX register can be divided into two independent 8-bit BH and BL registers;

The CX register can be divided into two independent 8-bit CH and CL registers;

DX registers can be divided into two independent 8-bit DH and DL registers;

The data stored in the BX register is generally used as an offset address.

The base address is actually a segment, and the segment address is stored in the segment register.

In the 8086 CPU, the CPU is addressed according to the < segment address: Offset address >.

In the 8086 CPU, only 4 registers can be in the [...] In the same way, these four registers are BX,SI,DI,BP respectively.

In the case of programming, we consider a number of contiguous memory units as a segment,

Segments have data segments, code snippets, and stack segments, and they are clearly meant to store data, code, and memory space as a stack.

Different segments, their default segment addresses are stored in different registers,

The segment address of the data segment is stored in the DS (data segment) Register,

The segment address of the code snippet is placed in the CS (code segment) Register,

The segment address of the stack segment is stored in the SS (stack segment) register.

CS:IP Two registers indicate the address of the instruction that the CPU is currently reading, where CS is the code segment register and IP is the instruction pointer register.

How does the CPU automatically read the instructions?

When we run an executable file, we need another program to load the executable into memory, which we think is the shell program to

Load the executable program, which loads the executables into memory, sets two registers in the CPU, which is set CS:IP two registers, pointing to

The starting address of the executable file from which the CPU can read the instructions in memory and execute.

The start tag in assembly language is used to mark the starting address of this piece of code.

The segment address of the top of the stack is stored in the SS and the offset address is stored in the SP register.

At any point, the SS:SP is the top element of the stack.

Segment support is embodied on the CPU, not within the implementation of the paragraph. Paragraph is a logical concept, they are a part of the inside, why do you want to divide data segments and code snippets? This is for programming convenience, or code writing convenience.

CF (Carry flag)-Carry flag (No. 0 bit);

PF (Parity flag)-parity flag (second bit)

AF (auxiliary carry flag) auxiliary carry flag (4th bit)

ZF (zero flag) 0 flag (6th bit)

SF: Sign Bit (7) TF (trap flag) tracking Flag (8)

of (over flag) overflow flag (11th bit)

When you write the name of the assembly directive or register, it is not case sensitive, such as move ax 18,mov ax 18, equivalent.

Ax is a 16-bit register, so only 4 hexadecimal digits can be stored, if the data stored in more than 4 bits, then its storage low, high-level storage in the DX.

Programming calculates 2 of the 4-time Square

Mov add

Mov AX 2;

ADD AX 2;

ADD ax2;

ADD ax2;

When the CPU accesses the memory unit, it gives the address of the memory unit, the storage space of all memory units is one dimensional linear space, each intrinsic unit has a unique address in this space, we refer to this address as the physical address.

The CPU must be the physical address of a memory unit to feed the memory through address bus, but before sending the physical address to address bus, it must first form a

This physical address, different CPUs have different ways of generating physical addresses.

The address Adder uses the physical address = segment Address to move left four bits (multiply 16) + offset address of the segment address and offset address to synthesize the physical address.

Our knowledge of things limits our use of them. At least in the sense of limiting its use, perhaps in practice, there is no intention of new application.

The CPU can use different segment addresses and offset addresses to form the same physical address.

Offset address 16-bit, the range of 0-FFFFH, can be used to locate 64KB of internal deposit cells.

What does the CPU tell the memory address to store data or data?

According to the content of CS:IP, if this address is equal, it is the code.

JMP Cs:ip

JMP Legal Register: Modify IP with the value in the Register

Debug is the Debug tool provided by Dos,windows for the real Mode (8086) program, which can be used to view the contents of various registers in the CPU, the memory situation and the operation of the machine code level tracker.

Debug

A 1000:0

Then write

Assembly Instructions

Then modify the address of the CS:IP to 1000:0 and then T go to execute the instruction, observing the change of register;

Rcs

1000

Rip

0

The first section of compilation learning