Zero-dead corner game stm32-read excerpt 2

I. Pin

Stm32f103vet6, with 100 pins. Except for Crystal Oscillator input, power input, and boot pins, the remaining 80 pins are gpio. They are distributed in gpioa ~ Of the five port groups of gpioe, each group has 16 pins. All gpio pins can be used as inputs to external interrupt sources, and each gpio pin can be configured in 8 modes, different pins also have the corresponding reuse function and reuse function re- ing, which is sufficient to meet application requirements.

The input mode (gpio_mode_in_floating) of stm32 is not connected to the chip, nor is it connected to the drop-down resistor. It is input through the trigger. In this mode, the voltage on the pin is measured by a voltmeter at a few volts, which is an uncertain value. Because of its large input impedance, this mode is generally used for standard communication protocols such as I2C and usart receivers.
In the simulation input mode (gpio_mode_ain), The Schmidt trigger is disabled, and the voltage signal is transmitted to the peripheral module on the chip through another line without being connected or pulled down. If it is transmitted to the ADC module, the ADC collects voltage signals. When using ADC peripherals, you must set it to analog input mode.

Afio (alternate-function I/O) refers to the reuse function of gpio ports. In addition to common input and output (main function), gpio can also be used as the multiplex input and output of on-chip peripherals, such as serial port and ADC, these are reusable functions. Most gpio have a default reuse function, and some gpio also have the re ing function. The re ing function refers to transferring the default reuse function of the original A-pin to B-pin for use, the premise is that the B-pin has this re ing function.

When using gpio as an exti external interrupt or re- ing function, you must enable the afio clock. When using the default reuse function, you do not need to enable the afio clock.

Ii. Interruption

Stm32 re-orchestrates the interrupt vector table and defines the interrupt vectors numbered from-3 to 6 as system exceptions. kernel exceptions numbered as negative cannot be set with priority, such as reset, NMI, and hardfault ). External interruptions start from 7. The priority of these interruptions can be set on your own.

Objective C is a component of the cortex kernel. NMI and External Interrupt cannot be shielded. Objective IcK is not controlled by Objective C.

The interrupt vector of stm32 has two attributes: preemptible and response. The smaller the attribute number, the higher the priority.
Preemptible refers to the attribute that interrupts other interruptions. That is, nested interruptions occur because of this attribute. (B is interrupted when the interrupted service function a is executed, the interrupt service function B is executed before the interrupt service function a is executed. The preemptible attribute is configured by the nvic_irqchannelpreemptionpriority parameter.
When the preemptible attribute is the same for an application, when the preemptible attributes of the two interrupt vectors have the same preemptible priority, and if the two interrupts arrive at the same time, the application first processes the interrupt with a high response priority, the response property is configured by the nvic_irqchannelsubpriority parameter.