Chapter2 MSP430 Hardware Structure

1. General architecture

MSP430 MCU adopts von Neumann structure, including 16-bit RISC CPU, memory, on-chip peripheral, clock system, simulation system and data bus and address bus.

2, msp430x CPU (Cpux)

DB AB Alu-Number

• MSP430F1XX 16-bit 16-bit (maximum addressing 64KB) 16-bit->CPU
• Msp430f2xx/4xx/5xx/6xx 16-bit 20-bit (maximum addressing 1MB) 20-bit->cpux

CPU Internal registers:

R0:PC program Counter procedure Pointer 20bits

R1:SP point stack stack pointer 20bits down

R2:SR/CG1 Status Register 16bits

R3:CG2 Constant Generator Constant generator

R4~R15:GP General Purpose Universal Register for storing 8b, 16b, 20b of data, byte operation will clear 19:8 bits, the word operation will clear 19:18 bits.

SR corresponds to bit action ↓

V->overflow n->negative Z->zero C->carry

Scg1,scg0->system Clock Generator

OSC off,cpu off-> Energy Saving mode related

Gie->general Interrupt enable-> Universal Interrupt Enable

3. Memory

4. Minimum system

Single chip microcomputer, power supply circuit (lvtll3.3v), reset circuit, crystal oscillator circuit (not required), programming circuit

Chapter2 MSP430 Hardware Structure