Linux core-14. Processor

Article title: Linux core-14. Processor. Linux is a technology channel of the IT lab in China. Includes basic categories such as desktop applications, Linux system management, kernel research, embedded systems, and open source.
Original: David A Rusling
Translation: Banyan & fifa
Chapter 4 processor
Linux can run on many types of processors. This chapter will describe them briefly.
13.1X86
Omitted
13.2 arm
Arm is a low-power, high-performance 32-bit CPU. It is widely used in embedded devices such as mobile phones and PDAs. There are 31 32-bit registers, 16 of which can be seen in any mode. Its commands are simple loading and storage commands (load a value from the memory, and then put it back into the memory after the operation is completed ). An interesting feature of arm is that all its commands contain conditions. For example, you can test the value of a register, but you will not be able to execute these commands unless you use the same condition the next time. Another feature is the ability to perform arithmetic and shift operations while loading values. It can operate in several modes, including using SWI (software interrupt) commands to enter the system mode from user mode.
　　
ARM processors are a complex, and ARM companies do not make their own microprocessors. They are manufactured by ARM Partners (Intel or LSI. Arm also allows other processors to be tightly coupled through the coprocessor interface. It also includes several memory management unit variants, including simple memory protection to complex page layers.
13.3 Alpha AXP processor
Alpha AXP is a 64-bit load/store-type RISC processor designed to achieve high speed. All its registers are 64-bit; they also have 32 integer registers and 32 floating-point registers. 31st integers and floating-point registers are used for null operations. Reading them will get 0, which has no effect on their writing. All commands are 32-bit and memory operations are neither write nor read. This structure allows different implementations.
　　
You cannot operate on values in the memory. all data operations are completed in registers. Therefore, if you try to increase the number of counters in one memory, you must first read the registers and then write them back. Mutual operations between commands are only performed by writing one of the registers and memory locations, while the other is read from the registers or memory locations. An interesting feature of the Alpha AXP processor is that it contains instructions that generate a flag. For example, to test whether the values in two registers are equal, the result is not stored in the processor status register but placed in the 3rd registers. It seems strange at the beginning, but deleting the dependency on the status register will make it easier to construct an architecture with a high-volume multi-emission CPU. Instructions in unrelated registers do not have to waste execution time waiting from a single status register. The lack of direct memory operations and a large number of registers can also help with the multi-emission structure.
The Alpha AXP structure uses a group of subprograms called the PALcode. This PALcode depends on a specific operating system, CPU implementation of the Alpha AXP system, and system hardware. These subroutines provide context switching, interrupt, exception, and memory management primitives for the operating system. They can be called by hardware or through the CALL_PAL command. PALcode uses standard Alpha AXP assembly code to write and make some extensions to provide direct access to underlying hardware commands, such as internal processor registers. PALcode is executed in a privileged mode called PALmode. in this case, it stops some system events and allows PALcode to fully control the hardware of the physical system.