three ways to download FPGA: Active configuration mode ( as ) and passive configuration mode ( PS ) and the most commonly used (JTAG) How to configure :
asbyFPGAThe device boot configuration operation process, which controls the external memory and initialization process,EPCSSeries.asEPCS1,EPCS4Configuring the device to be dedicated asmode, currently only supportsCycloneseries. UseAlteraserial configuration device to complete. Cycloneperiod in the active position, the configuration period in a subordinate position. Configuration data throughDATA0Pin-fedFPGA. The configuration data is synchronizedDCLKinput,1Clock Cycle Transfer1bit data.
PSthe configuration process is controlled by an external computer or controller. Through the Enhanced configuration device (EPC16,EPC8,EPC4) and other configuration devices to complete thePSduring configuration, the configuration data is stored externally from theDATA0Pin-fedFPGA. Configuration data isDCLKrising along the latch,1Clock Cycle Transfer1bit data.
JTAGinterface is an industry standard,mainly used in chip testing and other functions,UseIEEE Std 1149.1Joint boundary Scan Interface pin, supportJAM STAPLStandard, you can useAlteraDownload the cable or the master controller to complete.
The difference between as PS Jtag:
As mode: Burned to the FPGA configuration chip saved, FPGA device every time the power up, as a controller from the configuration device EPCs actively emit read data signal, so that the EPCs data read into the FPGA, to achieve FPGA programming;
PS Mode: EPCs as a control device, the FPGA as a memory, the data written to the FPGA, to achieve the FPGA programming. This mode can be realized on-line FPGA programmable;
JTAG: Directly burned into the FPGA, because it is SRAM, power off to re-burn;
. pof files can be downloaded via as mode (ensure BYTEBLASTERII/USB blaster connection is correct);
. sof files or converted. JIC can be downloaded via JTAG.
FPGAwhen it is working properly, its configuration data is stored in theSRAMmust be re-downloaded when power is added. In an experimental system, debugging is usually done with a computer or a controller, so you can usePS. In a practical system, most of the cases must beFPGAThe active boot configuration operation process, at this timeFPGAThe configuration data is actively obtained from the perimeter-specific storage chip, and the chipFPGAconfiguration information is designed using a common programmerPOFformat of the file burned in.
Dedicated configuration device:EPCtype of memory
Common configuration devices:epc2,epc1,epc4,epc8,epc1441 (Now it seems like it's been phased out.)wait
forCyclone CycloneiiSeries Devices, ALTERAalso provides a asmode of configuration device, EPCSSeries.asEPCS1,EPCS4The configuration device is also serial configured.Note,they only apply toCycloneSeries.
except asand thePSWait OrderBITconfiguration, some devices are now supportedPPS,FPSand so on some parallel configuration mode, the configuration speed is increased. Of course, the plug-in circuit is alsoPSthere are some differences. There are also processor configurations such asJrunnerWait, if you need any moreBaidu, at least 10 kinds. LikeAlterathe way the company is configured is mainlypassiveserial (PS), Active Serial (AS), Fast Passive Parallel (FPP), Passive parallelsynchronous (PPS), Passive Parallel Asynchronous (PPA), Passive serialasynchronous (PSA), JTAGand so on seven ways of configuration, whereCyclonethe supported configuration methods arePS, as,JTAGThree kinds.
generally in doingFPGATest Board,(asCycloneSeries)the time,withAs+jtagWay,This can be usedJTAGmode Debugging,and after the final program has been debugged correctly,,re-use asmode to burn the program to the configuration chip.
scope of application for files with different suffix names in the project:
Sof (sramobject File)when used directlyPSThe configuration data under theFPGAto use., USB BLASTER,MASTERBLASER,BBII,BBMVapplicable, Quartusiiis automatically generated,all other configuration files are created by theSOFgenerated by.
POF (Programmer Object File)also byquartusiiAuto-generated, Bbiiapplicable, asconfiguration data in the configuration chip
RBF (Raw Binary File)binary files for microprocessors.in thePs,fpp,pps,ppauseful under Configuration
RPD (Raw programing Data File)includebitstreamthe binary file,available asMode configuration,only byPOFfile Generation
Hex (hexadecimal file)That 's not much to say.,a lot of single-chip computer
TTF (Tabular Text File)Suitable forFpp,pps,ppa,and thebit-wide PSHow to configure
SBF (Serial bitstream File)withPSMode configurationFlex 10kand theFlex6000the.
as mode Download: That is, generate POF files, by activeserial Programming mode Download: (software version 11.0)
1. First set the type of the configuration chip. So that it can produce POF files when compiling.
Set it up and compile it. Generate POF File
Then, replace the JTAG interface on the board with the as download interface
Download Settings:
after adding the Verify and the Blank Check option (because we use the USB Blaster download, so need to verify)
before you download will be USB the download switch dials to PROG , then click the Download button to go to the download page Download program.
2 . Another way to download the cured download (indirect jtag download):
(Compile the generated SOF file, which is the download file under Jtag mode)
1.
Then click Close and then compile again. Last Download:
The last download will be ....
The last reminders are:::::::-::EPCs Limited number of downloads ,,,, specifically see datasheet ...
This article references: http://blog.sina.com.cn/s/blog_7d1e2bb101016w1n.html
Quartus 11.0 as download mode and JTAG download Jic file Way