1, why to use makefile to do multiple. C File Compilation:
(1). Generally, when we are in the project development, we will set up the project, there are many directories below, and there are many different directories. c file, this needs to be compiled together.
(2). If we compile ourselves manually, multiple program files are intertwined, and there will be dependencies and dependencies between different file resources. Then there will be a problem at compile time: The dependencies must be resolved before the dependencies are resolved .
In this case, we will be very difficult to compile manually, we must first remember the dependencies, to know the compilation sequence, and then each time the implementation of a very large number of GCC compiler command to complete the final compilation target (gcc also with many parameters).
(3). Makefile,makefile is an effective tool for engineering management and is written in scripting language.
2, the use of makefile rules:
Use the command: Make Test
./test (test is the final target file you generated)
Make: Modify only your newly changed files
Rules for writing in makefile:
target ...: [Dependencies ...]
[[@] command]
(1). [] In the write-writable content.
(2) [Email protected] symbol: The close symbol that the command appears on the terminal.
(3). You must have a tab symbol before the command.
Variables can be defined in makefile, benefits: reduced writing rules.
Use format for variable: ${variable name}.
Automatic variables:
| Command |
Explain |
| [Email protected] |
Represents the target file in the rule |
| $^ |
Represents all dependent files in the rule |
| $< |
Represents the first dependent file in a rule |
| %.O:%.c |
All the. o files correspond to the. c Files (schema rules) that depend on each other. |
Note: (1). Makefile. Phony:clean means that when the clean file is in the current directory, execute the command clean in makefile.
(2). Executes the command that determines the rule when there are certain rules in it.
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This is the makefile content before the variable is used.
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This is a thin makefile after the use of variables.
3, a bit of knowledge of the head file.
< > and "" The difference:<, in the system of the designated directory down, under normal circumstances in/usr/include/xxx.h
"", under the current directory, look for
Format of the header file:
#ifndef _test_h_
#define _test_h_
......
#endif Conditional precompilation Purpose: Prevents duplicate inclusion of the header file.
4, the use of GDB
(1). Command: Gcc-g test.c-o Test (-G is the parameter that the debugger must use)
Gdb-q Test (-Q skip prompt, direct debug) (test the target file to debug)
Start into commissioning
s and n:s indicate the encounter function, do not enter the function, continue to debug, n means to enter the function, jump to the function to debug.
(2). Set Breakpoint B line number
Run: This will jump to the line.
Delete Breakpoint D n (n is not the number of rows, which means the breakpoint is deleted)
View Breakpoint Info b
(3). Some outputs:
Print/Format the corresponding amount
p/x str p/c *str p/d str ... You can view the corresponding address, value, character ...
Leave gdb debug: Q
Simple use of makefile and GDB