Stm32 cainiao growth record-common timer Application

I. general timer principle of stm32

The stm32 series CPU has up to 8 timers. Among them, tim1 and tim8 are advanced timers capable of generating three pairs of PWM complementary outputs, which are commonly used in the drive of Three-Phase Motors, their clock is generated by the output of apb2. The other six are common timers, and the clock is generated by the apb1 output.

For the timer clock section in the clock allocation diagram of stm32 reference manual:

It can be seen that the timer clock is not directly from apb1 or apb2, but from a frequency divider input as apb1 or apb2, the blue part in the figure.

The following uses the clock of universal Timer 2 to explain the function of this frequency divider: when the pre-division coefficient of apb1 is 1, this frequency divider does not work, and the timer clock frequency is equal to the frequency of apb1; when the Pre-division coefficient of apb1 is other values (I .e., the pre-division coefficient is 2, 4, 8 or 16), this frequency divider works, and the timer clock frequency is equal to twice the apb1 frequency.

Some of you may not understand it. OK. Let's give an example. Assume that AHB = 36 MHz, because the maximum frequency allowed by apb1 is 36 MHz, the pre-division coefficient of apb1 can be any number;

When the Pre-division coefficient is 1, apb1 = 36 MHz, tim2 ~ Clock frequency of 7 = 36 MHz (frequency divider does not work );

When the Pre-division coefficient is 2, apb1 = 18 MHz, tim2 ~ The clock frequency of 7 is 36 MHz.

Someone will ask, since tim2 ~ is required ~ If the clock frequency of 7 is 36 MHz, why not directly use the pre-division coefficient of apb1 = 1? The answer is: apb1 should not only be tim2 ~ 7 provides the clock and other peripherals also provide the clock. setting this frequency divider can ensure that other peripherals use a lower clock frequency.

Stm32 peripheral user manual,

Another example: When AHB = 72mhz, the pre-division coefficient of apb1 must be greater than 2, because the maximum frequency of apb1 can only be 36 MHz. If the Pre-division coefficient of apb1 is 2, The tim2 ~ 7 still can get the 72 MHz clock frequency. The higher clock frequency can undoubtedly improve the timer resolution, which is exactly the original intention of designing this frequency divider.

Ii. Universal timer programming for stm32

Timer programming is interrupt programming. Because the timer MUST be interrupted.

Step 1: rcc_configuration (); // set the system clock, including the RCC clock configuration, doubling to 72 MHz.

Step 2: Configure gpio using the gpio_cfg () function. The implementation of this function is as follows:

 

Void gpio_cfg () {gpio_inittypedef gpio_initstructure; random (random | Random, enable); random = gpio_pin_6; // select Pin 6 serial = gpio_speed_50mhz; // output frequency up to 50 MHz gpio_initstructure.gpio_mode = gpio_mode_out_pp; // output gpio_init (gpioc, & gpio_initstructure) with a pulling resistor );}

In fact, the timer does not need to be configured with gpio pins, but in the timer experiment,

We need to configure the corresponding gpio pin to use the LED light once every second for the experiment.

 

Step 3: Use the nvic_config () function for configuring nested interrupt controllers, but the initialization process is slightly different. Here we also list the function implementation:

From the implementation of the above functions, we actually only changed the value of nvic_irqchannel, the struct member. Now we need the channel tim2, so the initialization value is tim2_irqchannel. It can also be seen from this that this function can actually be seen as a model and can be used directly after being modified in other programs.

 

Void nvic_cfg () {nvic_inittypedef nvic_initstructure; // select interrupt group 1 nvic_prioritygroupconfig (nvic_prioritygroup_1); // select tim2 interrupt channel break = tim2_irqchannel; // The preemptible interrupt priority is set to 0 bytes = 0; // The response interrupt priority is set to 0 nvic_initstructure.nvic_irqchannelsubpriority = 0; // enable nvic_initstructure.nvic_irqchannelcmd = Enable; nvic_init (& nvic_initstructure );}

Step 4: Initialize the timer configuration using timer_config ();. OK. The key part is displayed.

Let's take a look at the implementation process:

Timer_cfg (); // timer configuration // enable Timer 2 tim_cmd (tim2, enable); voidtimer_config (void) {rcc_apb1periphclockcmd (enabled, enable); tim_deinit (tim2 ); tim_timebasestructure.tim_period = 2000-1; // value of the auto-Reload register watermark = (36000-1); // the frequency of the clock pre-score watermark = tim_ckd_div1; // the sampling frequency watermark = tim_countermode_up; // The upward counting mode is tim_timebaseinit (tim2, & tim_timebasestructure); tim_clearflag (tim2, tim_flag_update); // clear the overflow interrupt mark tim_itconfig (tim2, tim_it_update, enable, enable); // enable the clock}

Let's explain each statement. To use a timer, you must enable the timer clock. This is the rcc_apb1periphclockcmd () function, which enables rcc_apb1periph_tim2.

Tim_deinit (tim2); this function is mainly used to reset the tim2 timer so that it enters the initial state.

Then we assign values to the auto-Reload register. The size of tim_period actually indicates that an update or interruption will occur only after the tim_period count. Next we need to set the expected clock frequency tim_prescaler. Here is a formula, for example:Clock frequency = 72 MHz/(clock pre-division + 1). This indicates that the currently set tim_prescaler directly determines the timer clock frequency. In layman's terms, it is how many times a second can be counted. For example, the calculated clock frequency is 2000, that is

If tim_period is set to 2000, it will be interrupted once after 4000 counts. Since the clock frequency is counted 2000 times per second, it will be interrupted once every 2 seconds.

In the subsequent code, we also need to pay attention to the following: tim_timebasestructure.tim_countermode = tim_countermode_up; that is, we generally use the upward counting mode, that is, each count will be added with 1 until the register overflow is interrupted. Don't forget to enable the timer !!

Interrupt time = (tim_prescaler + 1) * (tim_period + 1)/flk

The above formula can be used to calculate the interruption time (2000-1 + 1) * (36000-1 + 1)/72000000 = 1 second

Step 5: Write the interrupt service program. You also need to note that the first step to get into the interrupted service is to clear the interrupt flag. Because we use the upstream overflow mode, we use

The function should be: tim_clearitpendingbit (tim2, tim_flag_update );.

The stm32 Development Board implements the following interrupted service programs:

Every second, when the interrupt occurs, enter the interrupt function execution program and let the LED flash. The file of the interrupt program is stm32f10x_it.c.

/*************************************** **************************************** * Function Name: tim2_irqhandler * Description: This function handles tim2 Global interrupt request. * input: none * output: none * return: none *************************************** ***************************************/ void tim2_irqhandler (void) {u8 readvalue; If (tim_getitstatus (tim2, tim_it_update )! = Reset) // check whether an overflow update event occurs {tim_clearitpendingbit (tim2, tim_flag_update); // clear the tim2 interrupt bit to be processed // uart2_tx485_puts ("123450 "); /* debug the timer test */readvalue = gpio_readoutputdatabit (gpioc, gpio_pin_6); If (readvalue = 0) // If the port is currently low, {gpio_setbits (gpioc, gpio_pin_6); // change it to high-level output;} else // if this port is currently high, {gpio_resetbits (gpioc, gpio_pin_6 ); // change it to low-level output ;}}}

 

General timer Working Principle

Compiled code is downloaded in my resources: http://download.csdn.net/detail/yx_l128125/4508425