stm32f4--Timer principle and application (interrupt, input capture, PWM output)

Source: Internet
Author: User

First, Introduction:

Different STM32 series has a different number of timers, for now learning the STM32F40X series Total 14 timers, for these 14 timers can be divided into 3 categories, advanced timers, General timers and basic timers, three kinds of timers similar, The principle and application of timers are described below for general purpose timers. The general timer can be divided into 3 categories according to the number of digits and the way of counting, and the related classification chart is as follows:

Second, the application:

1. Update: Overflow or underflow of the counter. 2. Event triggering. 3, input capture. 4, output comparison. 5, support for positioning of the incremental coding and Hall sensor circuit. 5. The trigger input is managed as an external clock or as a cycle power supply. The section below will be related to the introduction and code analysis for some applications.

Third, Block diagram:

is a block diagram of the universal Timer TIM2~TIM5, the block diagram of the other timers is similar to that of the block diagram, except that the corresponding clipping is made on the basis of the block diagram to make small changes.

The bottom of the timer block diagram to do the relevant disassembly, and the various parts of the correlation analysis.

Four, clock selection and frequency division:

This part of the function is generated by a block diagram such as:

It can be found from the graph that the clock source is: 1, internal clock (ck_int). 2, external clock mode 1, external pin tix, generated by the Input capture section. 3, external clock mode 2, external trigger input ETR. 4, the internal trigger input ITRX, the clock is generated by another timer output, corresponding to the block diagram of the Trgo. The clock CK_PSC is generated after the corresponding selection.

This section also sets the timer's count mode, reset, and enable related operations in the relevant registers.

Five, the base unit

The block diagram of the base unit is as follows:

These include: 1, PSC prescaler, responsible for the selected clock CK_PSC division, the final counter used to generate the clock ck_cnt. 2, CNT counter: Responsible for counting, as the core unit of the timer. 3. Automatic Reload Register: Responsible for loading the value of the register into the timer after the related event is triggered.

VI. Input Capture

The basic description of the input capture function is that by detecting the edge signal on the TIM_CHX, the value of the current counter is stored in the corresponding Capture/compare register when the signal jumps. The functional section is shown in the Block diagram as follows:

In fact, this is the timer of 4 related channels, take out one of them to do correlation analysis, one of the channel block diagram is as follows:

TI1 for the channel input signal, after filtering to generate ti1f, and then through the edge detection (rising edge or falling edge), and then after the relevant selection of the signal generated by the divider to generate the last signal to be captured.

The relevant library functions for input capture are described below;

    void Tim_icinit (tim_typedef* timx,tim_icinittypedef* tim_icinitstruct);   Sets the relevant parameters for the channel.    void Tim_ocxpolarityconfig (tim_tpedef* timx,uint16_t tim_ocpolarity);   Channel polarity setting.    uint32_t Tim_getcapturex (tim_typedef* timx);   Gets the channel capture value.

Seven, output comparison

description of the output comparison function: Set the corresponding value in the CCRX register, the value in the counter is compared with the value, according to the comparison results and the corresponding polarity and validity setting, determine the output voltage level state. Same as the input capture, take out one of the channels for analysis, and one of the channels has the following block diagram:

The channel signal is passed through the output mode controller, and the desired output signal is obtained after setting the mode, polarity and switch. CCRX: Captures the comparison register for setting the comparison value. CCMRX: Sets the mode of PWM. The ccer:cc1p bit sets the polarity validity. CCER:CC1E bit output enable setting.

The output comparison related library functions are described below:

    void Tim_ocxinit (tim_typedef* timx, tim_ocinittypedef* tim_ocinitstruct)     //Set parameters for the relevant channel.    void Tim_setcomparex (tim_typedef* timx, uint32_t Comparex);    Sets the comparison value.
    Tim_ocxpreloadconfig (tim_typedef* timx, uint16_t tim_ocpreload);  The enable output is compared to pre-loaded.

    Tim_arrpreloadconfig (tim_typedef* timx, enable);//Enable automatic reload of pre-loaded registers


Viii. related initialization instance--input capture

Timer 5 Channel 1 input capture configuration//arr: Auto Reload value (TIM2,TIM5 is 32 bit!!) PSC: Clock Prescaler frequency void Tim5_ch1_cap_init (u32 arr,u16 psc) {gpio_inittypedef gpio_initstructure; Tim_timebaseinittypedef tim_timebasestructure; Nvic_inittypedef nvic_initstructure;  Rcc_apb1periphclockcmd (rcc_apb1periph_tim5,enable); TIM5 clock Enable Rcc_ahb1periphclockcmd (RCC_AHB1PERIPH_GPIOA, enable); Enable porta clock gpio_initstructure.gpio_pin = gpio_pin_0; Gpioa0gpio_initstructure.gpio_mode = gpio_mode_af;//multiplexing function gpio_initstructure.gpio_speed = GPIO_Speed_100MHz;// Speed 100mhzgpio_initstructure.gpio_otype = gpio_otype_pp; Push-pull multiplexing output gpio_initstructure.gpio_pupd = Gpio_pupd_down; Drop-down Gpio_init (gpioa,&gpio_initstructure); Initialize Pa0gpio_pinafconfig (GPIOA,GPIO_PINSOURCE0,GPIO_AF_TIM5);  PA0 Multiplexing bit timer 5 TIM_TIMEBASESTRUCTURE.TIM_PRESCALER=PSC; Timer divider tim_timebasestructure.tim_countermode=tim_countermode_up;   Up counting mode Tim_timebasestructure.tim_period=arr; Automatic reload value tim_timebasestructure.tim_clockdivision=tim_ckd_div1; Tim_timebaseinit (tim5,&tim_timebasestructure);Initialize the TIM5 input capture parameter Tim5_icinitstructure.tim_channel = Tim_channel_1; CC1S=01 Select input IC1 map to TI1 tim5_icinitstructure.tim_icpolarity = tim_icpolarity_rising;//rising edge capture tim5_icinitst Ructure. Tim_icselection = Tim_icselection_directti; Map to TI1 on tim5_icinitstructure.tim_icprescaler = TIM_ICPSC_DIV1; Configuration input divider, non-crossover tim5_icinitstructure.tim_icfilter = 0x00;//ic1f=0000 configuration input filter not filtered tim_icinit (TIM5, &tim5_ic Initstructure); Tim_itconfig (tim5,tim_it_update| tim_it_cc1,enable);//Allow update interrupts, allow Cc1ie to capture interrupt tim_cmd (tim5,enable); Enable Timer 5 Nvic_initstructure.nvic_irqchannel = TIM5_IRQN; nvic_initstructure.nvic_irqchannelpreemptionpriority=2;//preemption Priority 3nvic_initstructure.nvic_irqchannelsubpriority =0 ;//Sub-priority 3nvic_initstructure.nvic_irqchannelcmd = ENABLE;//IRQ Channel enable Nvic_init (&nvic_initstructure);// Initializes the VIC register according to the specified parameters,}

Ix. related initialization instance--PWM output

TIM14 PWM Partial initialization//PWM output initialization//arr: Auto Reload value//PSC: Clock prescaler frequency void Tim14_pwm_init (u32 arr,u32 PSC) {//This section requires manual modification of IO port settings gpio_ Inittypedef gpio_initstructure; Tim_timebaseinittypedef tim_timebasestructure; Tim_ocinittypedef tim_ocinitstructure;  Rcc_apb1periphclockcmd (rcc_apb1periph_tim14,enable); TIM14 clock Enable Rcc_ahb1periphclockcmd (RCC_AHB1PERIPH_GPIOF, enable); Enable Portf clock gpio_pinafconfig (GPIOF,GPIO_PINSOURCE9,GPIO_AF_TIM14);           GPIOF9 multiplexing for timers 14gpio_initstructure.gpio_pin = gpio_pin_9;        Gpiof9gpio_initstructure.gpio_mode = GPIO_MODE_AF;      Multiplexing function gpio_initstructure.gpio_speed = gpio_speed_100mhz;//speed 100mhzgpio_initstructure.gpio_otype = GPIO_OType_PP;        Push-pull multiplexing output gpio_initstructure.gpio_pupd = gpio_pupd_up;              Pull-up gpio_init (gpiof,&gpio_initstructure);  Initialize PF9 TIM_TIMEBASESTRUCTURE.TIM_PRESCALER=PSC; Timer divider tim_timebasestructure.tim_countermode=tim_countermode_up;   Up counting mode Tim_timebasestructure.tim_period=arr; Automatic Reload Value TIM_TIMEBASESTRUCTURE.TIM_CLOCKDIVISION=TIM_CKD_DIV1; Tim_timebaseinit (tim14,&tim_timebasestructure);//Initialize timer 14//initialize TIM14 Channel1 PWM mode tim_ocinitstructure.tim_ Ocmode = TIM_OCMODE_PWM1; Select timer mode: TIM Pulse width modulation mode 2 tim_ocinitstructure.tim_outputstate = tim_outputstate_enable; Compare output Enable tim_ocinitstructure.tim_ocpolarity = Tim_ocpolarity_low;  Output polarity: The TIM output is compared to a low polarity tim_oc1init (TIM14, &tim_ocinitstructure);  Initializes the peripheral TIM1 4oc1tim_oc1preloadconfig (TIM14, tim_ocpreload_enable) According to the parameters specified by T;  A pre-loaded register Tim_arrpreloadconfig (tim14,enable) that enables TIM14 on CCR1;//arpe enable Tim_cmd (TIM14, enable);   Enable TIM14}



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stm32f4--Timer principle and application (interrupt, input capture, PWM output)

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