指令集分類（MISC，CISC，RISC，OISC，ZISC）

轉載：http://en.wikipedia.org/wiki/Minimal_instruction_set_computer

 

Minimal instruction set computer

Minimal Instruction Set Computer
(MISC
) is a processor
architecture with a very small number of basic operations and corresponding opcodes
. Such instruction sets
are commonly stack based rather than register based to reduce the size of operand
specifiers. Such a stack machine
architecture is inherently simpler since all instructions operate on
the top most stack entries. A result of this is a smaller instruction
set, a smaller and faster instruction decode unit, and overall faster
operation of individual instructions. The downside is that instructions
tend to have more sequential dependencies, reducing instruction-level parallelism
. MISC architectures have much in common with the Forth programming language
and the Java Virtual Machine
.

 

 

• Complex instruction set computer
  (CISC)
• Reduced instruction set computer
  (RISC)
• One instruction set computer
  (OISC)
• Zero instruction set computer
  (ZISC)