8086/8088 instruction System

One, data transfer instructions
1. Universal Data Transfer Instruction
MOV (move) transfer
push (push onto the stack) stack
Pop (pop from stack) out of stack
XCHG (Exchange) Exchange
. The MOV instruction
format is: MOV DST,SRC
to perform the operation: (DST) <-(SRC)
. PUSH stack Instruction
Format: PUSH&NBSP;SRC
Action: (SP) <-(SP)-2
((SP) +1, (SP)) <-(SRC)
. POP out stack directive
Format: POP&NBSP;DST
Action: (DST) <-((sp+1), (SP))
(SP) <-(SP) +2
. XCHG Exchange Instruction
Format: XCHG&NBSP;OPR1,OPR2
Actions performed: (OPR1) <--> (OPR2)

2. Accumulator Special Delivery instruction
in (input)   input
Out (output)   output
Xlat (Translate)   Change Code
This set of instructions is limited to using accumulator ax or Al to transmit information .
. In input directive
Long format:  in al,port (bytes)
In ax,port (word)
Actions performed:  (AL) <-(PORT) (bytes)
(AX) <- (Port+1,port) Word
Short Form:  in al,dx (bytes)
IN&NBSP;AX,DX (word)
Actions performed:  al<-((dx)) (bytes)
ax<-((DX) +1,DX) (word)
. Out output Directives
Long format:  out port,al (bytes)
out Port,ax (word)
Actions performed:  (PORT) <-(AL) (bytes)
(port+1,port <-(AX) (word)
Short form:  out dx,al (bytes)
Out dx,ax (word)
performed operation:  ((DX)) <-(AL) (bytes)
(dx +1, (DX)) <-ax
in the ibm-pc machine, the external device can have up to 65,536 I/O ports, and the port (that is, the port address of the peripheral) is 0000~FFFFH. The first 256 ports (0~FFH) can be specified directly in the directive. This is the port in the long format, at which point the machine instruction is represented in two bytes, and the second byte is the port number. Therefore, you can specify the port number directly in the specified, but only the first 256 ports in a long format. When the port number is >=256, only the short form is used. You must first put the port number in the DX register (the port number can be from 0000 to 0FFFFH), and then use the in or out instruction to transmit the information.
. xlat  Change Instruction
Format: &NBSP;XLAT&NBSP;OPR
or:  xlat
Actions performed: (AL) <-((BX) + (AL))

3. Valid address send register instruction
LEA (Load effective addresses) valid address delivery registers
LDS (Load DS with pointer) pointer delivery registers and DS
LES (Load ES with pointer) pointer send registers and ES
. LEA Valid Address delivery register
The format is: LEA reg,src
Action performed: (REG) <-src
The instruction sends the valid address of the source operand to the specified register.
. LDS pointer send registers and DS directives
Format is: LDS reg,src
Action performed: (REG) <-(SRC)
(DS) <-(src+2)
The 4 sequential bytes specified by the source operand are sent to the registers and the DS registers specified by the instruction. The instruction often specifies an SI register.
. LES pointer Send register and ES instruction
The format is: LES reg,src
Action performed: (REG) <-(SRC)
(ES) <-(src+2)
The 4 sequential bytes specified by the source operand are sent to the registers and ES registers specified by the instruction. The directive often specifies the DI register.

4. Sign Register transfer instruction
LAHF (Load AH with flags) flag send AH
SAHF (store AH into flags) AH send flag Register
PUSHF (push the flags) sign into the stack
Popf (pop the flags) logo out stack
. LAHF Flag Send Ah
Format is: LAHF
Action performed: (AH) <-(PWS low byte)
. SAHF AH send flag register
Format is: SAHF
Action performed: (PWS low byte) <-(AH)
. PUSHF sign into stack
Format is: PUSHF
Action performed: (SP) <-(SP)-2
((SP) +1, (SP)) <-(PSW)
. Popf logo out Stack
Format is: Popf
Action performed: (PWS) <-((SP) +1, (SP))
(SP) <-(sp+2)

Second, the arithmetic instruction
1. Addition instruction
Add (ADD) addition
ADC (add with carry) with carry addition
INC (increment) plus 1
. Add addition instruction
Format: ADD dst,src
Action performed: (DST) <-(SRC) + (DST)
. ADC with carry addition instruction
Format: ADC dst,src
Action performed: (DST) <-(SRC) + (DST) +cf
. Add plus 1 instruction
Format: INC OPR
Action performed: (OPR) <-(OPR) +1

2. Subtraction Instruction
SUB (Subtract) subtraction
SBB (subtract with borrow) borrow subtraction
DEC (decrement) minus 1
NEG (negate) for mending
CMP (Compare) comparison
. SUB Subtraction Instruction
Format: SUB dst,src
Action performed: (DST) <-(DST)-(SRC)
. SBB with borrow subtraction instruction
Format: SBB dst,src
Action performed: (DST) <-(DST)-(SRC)-CF
. DEC minus 1 Instructions
Format: DEC OPR
Action performed: (OPR) <-(OPR)-1
. NEG Request for supplementary instructions
Format: NEG OPR
Action performed: (OPR) <--(OPR)
. CMP comparison directives
Format: CMP OPR1,OPR2
Action performed: (OPR1)-(OPR2)
This instruction performs a subtraction like the sub instruction, but does not save the result, but sets the condition to the Western Hemisphere based on the result.

3. Multiplication instruction
MUL (Unsigned multiple) unsigned number multiplication
Imul (signed multiple) with symbolic number multiplication
. MUL unsigned number multiplication instruction
Format: MUL SRC
Actions performed:
byte operand: (AX) <-(AL) * (SRC)
Word operand: (dx,ax) <-(AX) * (SRC)
. Imul with symbolic number multiplication instruction
Format: Imul SRC
Action performed: Same as Mul, but must be a signed number, and Mul is unsigned.

4. Division Instruction
DIV (Unsigned Divide) unsigned number division
Idiv (signed divide) with symbolic number division

CBW (convert byte to Word) bytes to Word
CWD (Contert Word to double word) into two words
. DIV unsigned number Division instruction
Format: DIV SRC
Actions performed:
BYTE operations: (AL) <-(AX)/(SRC) business
(AH) <-(AX)/(SRC) remainder
Word operations: (AX) <-(dx,ax)/(SRC) business
(AX) <-(dx,ax)/(SRC) remainder
. Idiv with symbolic number division instruction
Format: DIV SRC
Actions performed: The same as Div, but the operands must be signed, the quotient and remainder are signed, and the remainder has the same symbol as the divisor.
. CBW byte conversion to Word instruction
Format: CBW
Action performed: The content symbol for Al extends to AH. That is, if (AL) has a maximum significant bit of 0, (AH) = 00; if (AL) has a maximum significant bit of 1, then (AH) =0FFH
. CWD Word conversion to two-word instruction
Format: CWD
Action performed: Ax's content symbol expands to DX. The most significant bit of (AX) is 0, then (dx) = 0; otherwise (DX) =0ffffh.
None of these two directives affect the condition code.

Three, logical Directives
1. Logical Operation instruction
and (and) logic and
or (or)   logical OR
not (not)   logical non-
XOR (exclusive OR), or
TEST ( Test)   Testing
. and  Logic and Instruction
format: &NBSP;AND&NBSP;DST,SRC
Action: (DST) <-(DST) ^ (SRC)
.or  logical OR Directive
Format:  or &NBSP;DST,SRC
Operations performed: (DST) <-(DST) V (SRC)
. not  logical non-directive
Format: &NBSP;NOT&NBSP;OPR
Action performed: (OPR) <-(OPR)
. xor  XOR
Format: &NBSP;XOR&NBSP;DST,SRC
Action: (DST) <-(DST) V (SRC)
. test  test Instruction
Format: &NBSP;TEST&NBSP;OPR1,OPR2
Action performed: (DST) ^ (SRC)
Two operands and the result is not saved, based only on its signature conditional code

2. Shift Instruction
SHL (shift logical left) logical shift
SAL (shift arithmetic left) arithmetic shift
SHR (Shift logical right) logical shift
SAR (Shift arithmetic right) arithmetic shift
ROL (Rotate left) loops move
ROR (Rotate right) loop move
RCL (Rotate left through carry) with a carry loop to move the left-hand
RCR (Rotate right through carry) with rounding loop
Format: SHL opr,cnt (similar to the rest)
Where OPR can be any way of addressing other than immediate numbers. The number of shifts is determined by CNT, and CNT can be 1 or CL.
The cyclic shift instruction can change the position of all bits in the operand; the shift instruction is often used to do times 2 divided by 2. Where the arithmetic shift instruction is applicable to a signed number operation, Sal is used to multiply the 2,sar to divide by 2, while the logical shift instruction is used for unsigned number operations, and SHL is used to multiply the 2,shr to divide by 2.

Four, the string processing instruction
1. Movs,stos and lods instructions for working with Rep
. Rep repeating string operation until (CX) =0 is on
Format: REP string primitive
Where string primitive can be movs,lods or stos directives
Actions performed:
1) such as (CX) =0 exit rep, or down execution.
2) (CX) <-(CX)-1
3) performing a string operation
4) Repeat 1) ~3)
. Movs String Transfer instruction
Format: can have three kinds
Movs Dst,src
MOVSB (bytes)
MOVSW (Word)
The second to third format explicitly indicates that the byte or word is transferred, and the first format should indicate whether it is a word or byte operation in the operand, for example:
Movs Es:byte Ptr[di],ds:[si]
Actions performed:
1) ((DI)) <-((SI))
2) byte operation:
(SI) <-(SI) + (or-) 1, (DI) <-(DI) + (or-) 1
When the direction sign df=0 with +, when the direction sign df=1 use-
3) Word operation:
(SI) <-(SI) + (or-) 2, (DI) <-(DI) + (or-) 2
When the direction sign df=0 with +, when the direction sign df=1 use-
The directive does not affect the conditional code.
. CLD (Clear direction flag) This instruction enables df=0 to automatically increment the address when executing a string operation instruction;
. STD (Set direction flag) This instruction enables df=1 to automatically decrement the address when executing a string operation instruction.
. STOs to the serial command
Format: STOs DST
STOSB (bytes)
STOSW (Word)
Actions performed:
BYTE operations: ((DI)) <-(AL), (di) <-(di) +-1
Word Operation: ((DI)) <-(AX), (di) <-(di) +-2
The directive stores al or ax content in a cell in an additional segment specified by (DI) and modifies the contents of DI based on the value and data type of DF, and when it is associated with rep, the contents of al or ax are stored in a buffer of length (CX).
. LODs from the string Fetch command
Format: LODs SRC
Lodsb
Lodsw
Actions performed:
BYTE operations: (AL) <-((SI)), (SI) <-(si) +-1
Word operation: (AX) <-((SI)), (SI) <-(si) +-2
The instruction sends the contents of a unit in the specified data section to al or Ax and modifies the contents of SI according to the direction sign and data type. The instruction allows you to specify a non-data-segment storage using a segment spanning prefix. The directive also does not affect the conditional code.
In general, this instruction is not used with Rep. This directive can be used when a string of characters in a buffer is sometimes required to be removed for testing.

2. CMPs and SCAs directives for joint work with REPE/REPZ and Repnz/repne
. REPE/REPZ repeat string operation when equal/zero
Format: Repe (or REPZ) String primitive
Where string primitive can be cmps or scas directives.
Actions performed:
1) such as (CX) =0 or zf=0 (that is, the result of a comparison of two operands ranging) exit, or down
2) (CX) <-(CX)-1
3 execution of subsequent serial instructions
4) Repeat 1) ~3)
. REPNE/REPNZ repeat string operation when not equal/not zero
Format: Repne (or REPNZ) String primitive
Where string primitive can be cmps or scas directives
Actions performed:
In addition to the exit criteria (cx=0) or zf=1, other operations are identical to the Repe.
. CMPS string comparison Instruction
Format: CMP SRC,DST
Cmpsb
Cmpsw
Actions performed:
1) ((SI))-((DI))
2 byte operation: (SI) <-(si) +-1, (di) <-(di) +-1
Word operations: (SI) <-(si) +-2, (di) <-(di) +-2
The instruction subtracts a word (or byte) from the data segment pointed to by (SI) from a word (or byte) in the additional segment pointed to by (DI), but does not save the result, but only sets the condition code according to the result, and the other attributes of the instruction are the same as the Movs instructions
. SCAS String Scan Instruction
Format: SCAS DST
Scasb
Scasw
Actions performed:
BYTE operations: (AL)-((DI)), (DI) <-(di) +-1
Word operation: (AL)-((DI)), (DI) <-(di) +-2
The directive compares the contents of Al (or ax) with a byte (or word) in an additional segment specified by (DI) and does not save the result, but sets the condition code according to the result. The other characteristics of the instruction are the same as those of the Movs.

V. CONTROL and TRANSFER instructions
1. Unconditional Transfer Instruction
. JMP (JMP) Jump instruction
1) Direct short transfer within paragraph
Format: JMP Short OPR
Action performed: (IP) <-+ 8-bit displacement
2) Direct close transfer in paragraph
Format: JMP NEAR PTR OPR
Action performed: (IP) <-+ 16-bit displacement
3) Indirect transfer within paragraph
Format: JMP WORD PTR OPR
Action performed: (IP) <-(EA)
4) Direct (FAR) transfer between paragraphs
Format: JMP FAR PTR OPR
Action performed: (IP) <-opr offset address in segment
(CS) The segment address of the &LT;-OPR
5) Indirect transfer between paragraphs
Format: JMP DWORD PTR OPR
Action performed: (IP) <-(EA)
(CS) <-(ea+2)
2. Conditional transfer Instruction
1) Transfer according to the setting of a single condition sign
. JZ (or JE) (Jump if zero,or equal) The result is 0 (or equal) to transfer
Format: JE (or JZ) OPR
Test conditions: Zf=1
. JNZ (or jne) (Jump if not zero,or not equal) result is not 0 (or not equal) the transfer
Format: jnz (or jne) OPR
Test conditions: zf=0
. JS (Jump if sign) result is a negative transfer
Format: JS OPR
Test conditions: Sf=1
. JNS (Jump if not sign) result is a regular transfer
Format: Jns OPR
Test conditions: sf=0
. JO (Jump if overflow) overflow is transferred
Format: JO OPR
Test conditions: Of=1
. Jno (Jump if not overflow) transfer without overflow
Format: Jno OPR
Test conditions: of=0
. JP (or JPE) (Jump if parity,or parity even) odd-even bit is shifted by 1
Format: JP OPR
Test conditions: Pf=1
. JNP (or JPO) (Jump if not parity,or parity odd) odd-even bit is shifted by 0
Format: JNP (or JPO) OPR
Test conditions: pf=0
. JB (or JNAE,JC) (Jump if below,or not above or equal,or carry) is below, or is not higher or equal to, or the rounding bit is 1.
Format: JB (or JNAE,JC) OPR
Test conditions: Cf=1
. JNB (or JAE,JNC) (Jump if not below,or above or equal,or not carry) is not below, or is above or equal to, or the rounding bit is 0
Format: JNB (or JAE,JNC) OPR
Test conditions: cf=0
2) compare two unsigned numbers and transfer according to the results of the comparison
. JB (or JNAE,JC)
Format: ditto
. JNB (or JAE,JNC)
Format: ditto
. Jbe (or JNA) (Jump if below or equal,or not above) is less than or equal to, or is not higher than the transferred
Format: Jbe (or JNA) OPR
Test conditions: Cfvzf=1
. Jnbe (or ja) (Jump if not below or equal,or above) is not less than or equal to, or is higher than the transfer
Format: Jnbe (or ja) OPR
Test conditions: cfvzf=0
3) compare two signed numbers and transfer them according to the result of comparison
. JL (or Lnge) (Jump if less,or not greater or equal) is less than, or not greater than or equal to, transferred
Format: JL (or Jnge) OPR
Test conditions: Sfvof=1
. JNL (or Jge) (Jump if not less,or greater or equal) is not less than, or is greater than or equal to, the transfer
Format: JNL (or Jge) OPR
Test conditions: sfvof=0
. Jle (or Jng) (Jump if less or equal,or not greater) is less than or equal to, or is not greater than the transferred
Format: Jle (or Jng) OPR
Test conditions: (SFVOF) vzf=1
. Jnle (or JG) (Jump if not less or equal,or greater) is not less than or equal to, or is greater than the transferred
Format: Jnle (or JG) OPR
Test conditions: (SFVOF) vzf=0
4 test CX for a value of 0 transfer instruction
. JCXZ (Jump If CX Register is zero) the contents of the CX register are shifted
Format: Jcxz OPR
Test conditions: (CX) =0
Note: The condition transfer is all 8-bit short jump!

3. Circular Instruction
. Loop loop Instruction
Format: LOOP OPR
Test conditions: (CX) <>0
. Loopz/loope loop instruction when zero or equal
Format: Loopz (or Loope) OPR
Test conditions: (CX) <>0 and Zf=1
. Loopnz/loopne loop instruction when not zero or unequal
Format: LOOPNZ (or Loopne) OPR
Test conditions: (CX) <>0 and zf=0
The steps of these three instructions are:
1) (CX) <-(CX)-1
2 Check whether the test conditions are met, such as the (IP) <-(IP) +d8 symbol expansion.

4. Subroutine
. Call Invocation command
. The RET returns the instruction
5. Interrupt
. INT instruction
Format:  int type
or  int
Actions performed: (sp) <-(SP)-2
((SP) +1, (SP)) <-(PSW)
(sp) <- (SP)-2
((SP) +1, (SP)) <-(CS)
(sp) <-(SP)-2
((SP) +1, (SP)) <-(IP)
(IP) <-(type*4)
(CS) < -(type*4+2)
. into  if overflow breaks the
action performed: If of=1:
(sp) <-(SP)-2
((SP) +1, (SP)) <-(PSW)
(sp) <-(SP)-2
((SP) +1, (SP)) <-(CS)
(SP) <-(SP)-2
((SP) +1, (SP)) <-(IP)
(IP) <-(10H)
(CS) <-(12H)
. iret  from interrupt return instruction
Format:  iret
: (IP) <-((SP) +1, (SP))
(SP) <-(SP) +2
(CS) <-((SP) +1, (SP)
(SP) <-(SP) +2
(PSW) <-((SP) +1, (SP))
(SP) <-(SP) +2

VI. Processor CONTROL Instruction
1. Sign processing instructions
. CLC Carry position 0 instruction (clear carry) cf<-0
. CMC carry bit negation instruction (complement carry) CF<-CF
. STC Carry position 1 instruction (Set carry) cf<-1
. CLD Direction sign 0 Instruction (clear direction) df<-0
. STD directional marker 1 Instruction (Set direction) df<-1
. CLI Interrupt Flag 0 Directive (clear interrupt) if<-0
. STI Interrupt Mark 1 instruction (Set interrupt) if<-0
2. Other processor control instructions
NOP (no opreation) no action
HLT (Halt) downtime
Waiting (Wait)
ESC (Escape) Change code
Lock (Lock) blockade
These instructions can control the processor state. None of these affect the condition code.
. NOP No Operation instructions
This instruction takes no action, its machine code occupies a byte, and it often uses this instruction to occupy a certain storage unit in order to replace it with other instructions when it is run.
. HLT Stop Command
This instruction causes the machine to suspend its work so that the processor is in an outage state to wait for an external interrupt to arrive, and the following procedure can be continued after the interruption is complete.
. Wait for command
This instruction causes the processor to be idle, and it can also be used to wait for the external interrupt to occur, but returns the waiting instruction to continue the virtue after the interruption has ended.
. ESC Code Change Instructions
Format ESC Mem
The MEM indicates a storage unit in which the ESC instruction sends the contents of the storage unit to the data bus. Of course, the ESC directive does not allow immediate numbers and register addressing. This instruction can be used to refer to instructions or operands from memory when performing certain operations using a coprocessor (coprocessor). coprocessor (8087) is the hardware that can be matched to improve speed.
. Lock Lockdown Command
The directive is a prefix that can be combined with other directives to maintain the latch signal of the bus until it is executed with its combined instructions. When the CPU works with other processors, the directive avoids damaging useful information.