ARM-based hardware startup design-allocation interrupt vector table

Source: Internet
Author: User

ARM requires that the interrupt vector table be placed in a contiguous 32-byte space starting from the 0x00000000 address. The address of the interrupt vector defined by ARM9 in the vector table is as follows:

When an interrupt occurs, the ARM processor forces the PC pointer to point to the address of the corresponding terminal type in the interrupt vector table.

The interrupt vector table is programmed as follows:

     code32
     AREA    startup,code,readonly
; * Exception Vector table */
Vectors
        ldr     PC, resetaddr          load the contents of the memory on the Resetadde address onto the PC
         ldr     PC, undefinedaddr
        ldr      pc, swi_addr
        ldr     pc, PREFETCHADDR
        ldr     PC, dataabortaddr
        dcd     0
         ldr     PC, irq_addr
        ldr      PC, fiq_addr

resetaddr           dcd     ResetInit   ; assigns resetaddr to Resetinit address value,
undefinedaddr       dcd      Undefined
swi_addr            dcd      softwareinterrupt
prefetchaddr        dcd      prefetchabort
dataabortaddr       dcd     Dataabort
nouse               DCD      0
irq_addr            DCD      irq_exception
fiq_addr             dcd     Fiq_handler

For Resetaddr, at this point resetaddr is essentially only a pointer (pointing to resetinit), there is no space allocated, and the RESETADDR address of the storage is loaded with the Resetinit address.

Resetinit
BL Initstack; Initializing the Stack
BL Targetbusinit; Bus system initialization (stack operations are not allowed in functions)
BL Targetresetinit; System initialization for the target board

In Resetinit, for example, the memory space allocation is as follows:

Note that the interrupt vector table is to be stored at the beginning of the code snippet startup (entry start), and when the program is linked, the startup code snippet is linked to the entire program's entry address.

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