C + + Learning Note 25:makefile File 2

Makefile file Syntax

Row parsing: command-by-row parsing

The beginning character of the command line is the TAB key, and the beginning of the other line character must not be the TAB key, but can be indented with multiple spaces

Line break: When the command is too long, the end of the line uses the "\" line wrapping

Note: lines of text with the line beginning with the "#" character

Turn off Echo: Add "@" before the line first word formatting command

• When ECHO is not turned off, make will first echo (print) The command and then execute the command
• This feature is typically used only in front of comments and plain-display echo commands

Include filename: contains additional files

• Processing mode is similar to C + +
• Add "-" at the beginning of the line: Ignore file contains error

Wildcard characters

"*" (any number of arbitrary characters), such as "*.c", means all the. c Files

“?” (any one character) for example:?. c denotes single character file name

"[ABC]" (There is a character in parentheses), for example "lib[abc].c" means a fourth character is a, B, or C

"[0-9]" (there is a character in the collection)

"[^ABC]" (there is a character that is not in parentheses)

Variable

Basic variable definition: Var_name = value

$ (variable name): Reference variable (no extra space in middle); Shell variable with "$$", for example: @echo $ $HOME

Variables are expanded when they are used, and are similar in form to macro substitution

Where to use variables: targets, prerequisites, commands, new variables

Built-in variables

$ (CC): currently used compiler; $ (make): The Make tool currently in use

Automatic variables

[Email protected]: current goal; $<: The first prerequisite for the current goal;

$?: All prerequisites for updates over targets

$^: All Prerequisites

$ (@D) and $ (@F): [email protected] Directory name and file name;

$ (<D) and $ (<f):$< directory name and file name

Example:

#makefile样本

OBJS = MAIN.O library.o

prog:$ (OBJS)

$ (CC)-O prog $ (OBJS)

@echo "Constructed ..."

MAIN.O:MAIN.C Library.h

$ (CC)-C MAIN.C

LIBRARY.O:LIBRARY.C Library.h

$ (CC)-C library.c

. Phony:clean

Clean

Rm-f Prog $ (OBJS) * ~

Note: ~ For the generated backup file

Variable definition Format

Var_name = value: Extended at execution time, allows recursion, can use values that appear in subsequent code

Var_name = value: Extended at definition, no recursion allowed, use present value on right, cannot use value appearing in subsequent code

Var_name = value: Set the value only if the variable is empty, otherwise maintain the original value

Var_name + = value: Appends the values to the end of the variable, and if the variable is undefined, "+ =" is automatically interpreted as "="; if the order is defined, then "+ =" inherits the last operator and appends the new value

Multi-line variable

Define Var_name

@echo "One"

@echo "The Other"

Endef

Define and Endef line characters cannot be tab, spaces can be used when aligning

Ref: $ (Var_name)

Multiline variables are primarily used to define command packages, use caution when using, and may cause script errors when expanded

Target variable: Similar to local variable, valid only for this target rule chain

-target...:var_name = value: Defines the target variable

Static mode: With "%" pass

Target...:target-pattern:prerequisites ...

[Tab key]commands

Purpose: To deal with multiple targets of the same pattern, simplifying script code

Example: Each target's file ends with ". O" and the prerequisites are the corresponding ". C"

OBJS = MAIN.O library.o

$ (OBJS):%.o:%.c

$ (CC)-C $ (CFLAGS) $<-o [email protected]

The above is equivalent to:

Main.o:main.c

$ (CC)-C $ (CFLAGS) Main.c-o MAIN.O

Library.o:library.c

$ (CC)-C $ (CFLAGS) Library.c-o library.o

Conditional Judgment Basic Format

Conditional-directive

Text-if-true

endif

----------------------------------

Or

Conditional-directive

Text-if-true

Else

Text-if-true

endif

-------------------------------------

Available conditions to judge

Determine if two parameters are equal

Ifeq (ARG1,ARG2), ifeq ' arg1 ' arg2 '

Ifeq "Arg1" "Arg2"

Determine if two parameters are not equal (IBID.)

Determine if a variable is defined: ifdef variable_name

Determine if a variable is undefined: ifndef variable_name

Loops: You can use the Shell loop in makefile

Rulefor:

For filename in ' echo $ (objs) '; \

Do \

Rm-f $ $filename; \

Done

Precautions

Loop as a shell loop, to ensure that multiple lines of command are executed in the same process, you must merge into a single command and add a branch mark at the end of the line

You can use the anti-quotation marks to execute the command, and the resulting collection can be used as a processing collection of loops

FileName itself is a shell variable and needs to be referenced using "$$"

Function: Use the "$ ()" identity as a variable

$ (Functions arg1,arg2,...): function call, function name, followed by comma-separated argument list, function parameter cannot have extra space before and after

$ (subst From,to,text): Make's string substitution function, replacing the from string in text with to, returns the replaced string

Example:

Comma: =,

#定义空值

empty:=

#定义空格

Space: = $ (empty) $ (empty)

Foo: = a b C

#将 "a b C" replaced by "A,b,c"

Bar: = $ (subst $ (space) $ (comma) $ (foo))

C + + Learning Note 25:makefile File 2