CPU instruction Set

Source: Internet
Author: User
Tags intel pentium

CPU as the core of a computer, its role is irreplaceable. And the CPU itself is only on the block silicon chip on the integration of ultra-large-scale integrated circuits, the number of integrated transistors can reach hundreds of millions, is a very advanced complex manufacturing process, with a fairly high technology content.

CPU instruction Set-concept

The CPU relies on instructions to calculate and control the system, and each CPU specifies a series of instruction systems that match its hardware circuitry at design time. The strength of instructions is also an important indicator of CPU, and instruction set is one of the most effective tools to improve the efficiency of microprocessor. From the current mainstream architecture, instruction set can be divided into complex instruction set and thin instruction set two parts, and from the specific application, such as Intel's MMX (multimediaextended), SSE, SSE2 (STREAMING-SINGLEINSTRUCTIONMULTIPLEDATA-EXTENSIONS2) and AMD 3dnow! are all CPU extensions that enhance the CPU's multimedia, The processing power of graphic images and the Internet. We usually refer to the CPU's extended instruction set as "the instruction set of the CPU".

CPU Instruction Set-Introduction

But why is such a sophisticated chip capable of controlling a large and complex computer system? This is the set of instructions that are integrated in the CPU. The so-called instruction set is a set of instructions that the CPU uses to compute and control a computer system, and each new type of CPU specifies a series of instruction systems that are compatible with other hardware circuits at design time. and the instruction set of advanced or not, but also related to the performance of the CPU, it is also an important indicator of CPU performance.
A powerful processor also requires the coordination of the instruction set (picture from the movie "Enemy of Machinery").
The instruction set of the CPU is divided into the compact instruction set and the complex instruction set from the mainstream architecture, while the common computer processor is basically the complex instruction set used. In the early development of the computer, the instruction set in the CPU is not divided type, but all kinds of programs need to match the instructions to integrate into the CPU, but with the progress of science and technology, the function of the computer is more and more powerful, the internal components of the computer are more and more, and more and more complex, CPU instructions also become very complex, and in the course of use, not every instruction should be completely executed, in the technical research process found that about 80% of the program only used 20% of the instructions, and some too redundant instructions seriously affect the efficiency of the computer, on this phenomenon, The concept of a streamlined instruction set is raised.
The simplified instruction set RISC is the abbreviation for (reduced instruction set Computing), while the complex instruction set CISC is the abbreviation (Complex instruction set Computing). The difference between them is that the number of instructions in the RISC instruction set is small, and each instruction takes the same byte length, is generally 4 bytes long, is aligned on the word boundary, and the field position is fixed, especially the location of the opcode. The CISC instruction set is characterized by the number and complexity of instructions, and the length of each instruction is not equal.
In operation, most operations in RISC instruction sets are register-to-register operations, and memory addresses are accessed only with simple load (read) and Sotre (store) operations. As a result, no more than 1 memory addresses are accessed per instruction, and instructions to access memory are not mixed with arithmetic operations. Functionally, RISC instruction sets are also more advantageous than complex instruction sets, which simplifies the design of the processor's controller and other functional units, eliminates the need for a large number of dedicated registers, and, in particular, allows the use of hardware lines to implement instruction operations, thus saving the manufacturing cost of the processor.
The processor using the CISC instruction set uses a micro-program to implement the instruction operation, which is inferior to the RISC instruction set in execution speed. In addition, RISC also strengthens the parallel processing ability, is very suitable for the use of the processor pipeline, ultra-pipeline and superscalar technology, so as to achieve instruction-level parallel operation, improve the performance of the processor. And with the development of VLSI (Very Large Scale integration VLSI) technology, the core of the entire processor and even multiple processor cores can be integrated on one chip. The architecture of RISC instruction set can bring many benefits to design single core multi-core processor, which is advantageous to the performance improvement of processor.
Due to the advantages of the RISC instruction set itself, the processor in the processor's high-end server domain has been widely used, while the CISC instruction set mainly uses the desktop processor products, such as the Intel Pentium series and AMD's K8 series processors. However, now RISC instruction set also constantly into the desktop domain, I believe that the subsequent processor command assembly slowly to RISC system closer, making the processor instruction set structure more perfect, more powerful, more and more mature technology.
The RISC instruction set has many characteristics, the most important of which are:
Instruction format specification: RISC instruction set usually uses only one or a few formats. The instruction is of a single length (typically 4 bytes) and is aligned on the word boundary. The position of the field, especially the opcode, is fixed.
Simplified addressing: Almost all instructions use register addressing, and the total number of addressing methods is typically no more than 5. Other more complex addressing methods, such as indirect addressing, are synthesized by software using a simple addressing approach.
Extensive use of inter-register operations: Most operations in a RISC instruction set are register-to-register operations and only access memory in simple load and store operations. As a result, no more than 1 memory addresses are accessed in each instruction, and the operation to access the memory is not mixed with arithmetic operations.
Simplifies processor architecture: the use of RISC instruction sets can greatly simplify the design of processor controllers and other functional units without the use of a large number of dedicated registers, especially allowing for instruction operations with hardware circuitry rather than using micro-programs like the CISC processor to implement instruction operations. The RISC processor therefore does not have to set up the micro-programmed memory like the CISC processor, and can quickly execute instructions directly.
Easy access to VLSI technology: with the development of LSI and VLSI technology, the entire processor (or even multiple processors) can be placed on a single chip. RISC architecture can bring many benefits to the design of single chip processors, improve performance and simplify the design and implementation of VLSI chips. Based on the VLSI technology, the manufacturing of RISC processors is much smaller and less expensive than CISC processors.
Enhanced processor parallelism: RISC instruction sets are very effective for pipelining, hyper-pipelining, and superscalar technology to achieve instruction-level parallelism and improve processor performance. At present, the internal parallel operation Technology of processor is basically based on the development and maturity of RISC architecture.
Due to the advantages of RISC system, it has been widely used in high-end systems, while the CISC system occupies a dominant position in the desktop system. And now, in the desktop field, RISC is also constantly infiltration, the expected future, RISC will be unified lake

CPU instruction Set

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