Embedded programming: Mixing C with the assembly

Source: Internet
Author: User

Main reference : "Deep Exploration embedded operating System" section 5.4

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Why embed assembly language?

Switch CPU interrupt,

Read some special registers of the CPU,

Functions such as setting up CPU mode cannot be implemented in C (because C is a high-level language, and high-level languages are shielded from the underlying hardware).

Improve speed? It seems that there is such a purpose, not quite clear.

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"Code Template"

__asm__ __volatile__ (

The "code part" Colon is a delimiter, and if it is part of the assembly code, the colon can be omitted

: Output Partial list If there is no input list, the colon must also be added

: Enter a partial list

: List of damaged parts);

ASM volatile ();

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Examples of embedded assembly code in C:

__asm__ __volatile__ (::: "Memory");

Tell GCC that the data in memory may have changed, to write back the register, in order to prevent the GCC over-optimization caused the problem of the purpose

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The addition function that embeds the assembly code in C language:

1 intadd(int A1,int A2)

2 {

3 ???????? int sum;

4 ???????? __asm__ __volatile__(

5 ???????????????? "Add%[sv1],%[AV1],%[av2]\n\t"

6 ???????????????? : [sv1] "=r" [ Sum]

7 ???????????????? : [av1] "R" (a1 av2] "R" (a2 ) /span>

8 ???????????????? :"R4","CC","Memory"

9 ???????? );

Ten ???????? return sum;

One }

The input list is separated by commas: equivalent to managing C language variables and assembly language variables

[Item Name] "Storage Type" (c language expression) because variables in C are now used in assembly language, so to specify a similar allocation, storage type

"R" Universal Register

"M" indicates that the following C-expression is a memory address

"I" indicates that the following C-expression is constant

See GCC Handbook for more

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Output list:

[Item Name] "= Qualifier" (c-language expression)

"=r" (sum) means that GCC assigns a register to sum, which is only used for the output calculation

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Damage list section: Tell GCC these registers need to generate code to save and restore, and in-memory data may change

Register

"CC" CPU flag register

"Memory"

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Instruction section:

The instruction part is enclosed in quotation marks, "\n\t" that is, newline characters and tab characters, which is exactly for GCC to format the output assembly code.

Add%[SV1],%[AV1],%[av2], why not use registers directly? Of course it is possible, but the use of the entry name is mainly to allow GCC to dynamically allocate registers, optimization code , that is, in assembly language we can define variables, and originally we write assembly language, is directly using the Register, This is equivalent to making assembly programming more advanced through GCC.

For example, code add%[SV1],%[AV1],%[av2], will normally be processed by GCC into code add r0, R0, R1, which is more advanced than writing the original pure assembler code directly.

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"Example Interpretation"

read CPU flag Register : That is, in the C programming process, we can call the C function to use only the assembly language to complete the function:

1 cpuflg_t hal_read_cpuflg()

2 {

3 ???? cpuflg_t cpuflg;

4 ???? __asm__ __volatile__(

5 ???????? "Mrs%[retcpr], CPSR\n\t"

6 ???????? : [RETCPR]"=r"(cpuflg) has an output entry [RETCPR], associated with a variable assigned to him by a general register, this entry is essentially a C-language variable in the Assembly World spokesperson, Finally C language directly ask CPUFLG value, and [RETCPR] is responsible for in the Assembly World Management it

7 ???????? :

8 ???????? :"cc","Memory"

9 ???? );

Ten ???? return cpuflg

One }

Ideally this line of code "Mrs%[retcpr], CPSR \n\t" will be processed by GCC into "Mrs R0, CPSR \n\t", while the R0 register is what GCC holds for function return values,

Finally, the corrupted part of the embedded assembly code template, the flag register for high-speed gcc,cpu may be corrupted, and the values in memory may change (but this part of the process does not require the C programmer to care, and temporarily does not matter)

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Switch arm920t CPU interrupt function : Read (into a register) > change > Write (write register back)

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switching interrupts in the CPU are implemented by setting the relevant bits in the CPSR register on the CPU, and the Cirqfiq in the code is a macro that is replaced with a constant 0xc0 when the GCC is preprocessed.

The qualifier "I" preceding it from the input entry in the above code tells Gcc,cirqfiq that it is a constant. GCC is determined by the size of this constant to allocate it in registers (the registers are essentially the same as memory , the difference is in the very fast access and possibly the agreed storage) or directly in the instruction encoding data (to meet the conditions of the immediate number of storage). And before the instructions in __asm__ __volatile__ () are executed, generate the relevant code to handle the problem.

damaged parts : Here the C language actually does not have the output variable, also does not have the intermediate variable, so the assembly code part uses registers the r0, because the code used in the R0, CPSR registers, therefore must write in the code template the corrupt part r0 (lets GCC in __asm__ __ Before the instruction in volatile__ () is executed, generate the relevant code that holds the value in the R0 register, and then revert back to the R0 register again, and it is visible that GCC is the first to analyze the embedded part of the whole and then to process the assembly code section.

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Embedded programming: Mixing C with the assembly

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