External interruption and timer interruption of Cortex-M0 learning in New Tang Dynasty

Source: Internet
Author: User

China Southern Airlines has been learning for two weeks, from the beginning of contact with the cortex-M0 of The New Tang Dynasty to the present, it has a certain understanding of its overall architecture, but still insufficient, let's take a note of your experiences and share them with you!

This project is an infrared module, that is, capturing, decoding, and transmitting infrared signals. Let the Development Board learn infrared signals! The world event, will be done in detail, learning is not overnight to solve the problem, so the first week of the task is familiar with the New Tang Cortex-M051 Development Board, I am on the hands of the smallest system, there is only one M0 kernel and pin, and nothing else.

When I first learned about embedded systems, I felt very strange about some concepts. For example, when I set up a crystal oscillator and triggered a descent edge, the embedded system is actually a tiny computer, and the crystal oscillator is just like our CPU, to make the device work, the crystal oscillator is like a power source without power. How can a machine work? The crystal oscillator sends out a period of high level, a period of low level, we often say that the CPU is GHz, it means that the CPU sends out a period of high level within 1 second, low in a period of time, this combination lasts 3G (that is, the third multiplication takes 9 to the power of 10), but the CPU in the embedded system cannot reach this speed, the crystal oscillator I used this time is 12 MHz (twelve times the tenth power of six). You can imagine how fast it is!

Back to the truth, external interruptions are based on examplesProgramThe timer interrupt can also be implemented according to the routine. I use external interrupt to capture the infrared signal. If I use the query, the efficiency is too low, the timer is used to implement latency. If software latency is used (namely, 3 or 4 for loops), the efficiency is low and the accuracy is not high. However, when I combine the external interrupt and timer interrupt, a problem occurs. In the service program of the external interrupt, the timer interrupt is not executed... this development board can interrupt nesting, and where is my negligence?

It is the priority of two interrupts. In registers, the default priority of all interrupts is 0 (that is, the highest priority). To implement interruption nesting, you must set a priority for the interrupt to be nested!

It took a week to complete decoding.AlgorithmI got it and got the debugging right. I met our lab's senior brothers and sisters. They were all very good and easy to get along!

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