Chapter 2 Summary

Source: Internet
Author: User

The CPU is composed of memory devices, controllers, registers, and other devices.

8086 the CPU has 14 registers, and all registers are 16-bit

 

1. General registers: ax, BX, CX, dx are called data registers:

Ax (accumulator): an accumulation register, also known as a accumulator;

Bx (base): Base Address Register;

CX (count): Counter register;

DX (data): Data Register;

SP and BP are also known as pointer registers:

SP (Stack pointer): Stack pointer register;

BP (base pointer): base pointer register;

Si and Di are also called as address register:

Si (source index): Source Address Register;

Di (destination index): Destination Address Register;

2. control register:

IP (Instruction Pointer): instruction pointer register;

Psw: Flag register;

3. segment register:

CS (code segment): code segment register;

DS (Data Segment): Data Segment register;

SS (stack segment): Stack segment register;

ES (extra segment): additional segment register;

These are common register classifications. Each register is 16-bit (double byte), and ax, BX, CX, dx4 data registers can be divided into two 8-bit registers.

4.4 Data registers can be split

For example, ax can be divided into AH (high register) and Al (low register ).

MoV Al, 15; set the low position to 8;

MoV ah, 0; this sets the high position to 0;

The value of ax is changed to 0008.

The byte is counted as byte. A byte consists of 8 bits, which can be contained in 8-bit registers.

Word: it is recorded as word. A word consists of two bytes. These two bytes are called the high byte and low byte of the word respectively.

The address divider uses the physical address = segment address * 16 + offset address method to combine the short address and offset address into the physical address.

 

CS and IP are the two most critical registers in the 8086cpu, which indicate the address of the CPU to read the instruction. CS is the code segment register, and IP is the instruction pointer register. We can see their relationship with the instruction from the name. The segment address of the CS command, and the offset address of the IP address. At any time on the 8086 host, the CPU executes the Cs: IP point content as a command.

JMP commands are unconditional jump commands.

For example, after JMP 2ae3: 3 is executed: cs = 2ae3h, IP = 0003 H

The meaning of JMP ax is as follows: mov IP, ax

Chapter 2 Summary

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