Chapter II Summary of registers

Source: Internet
Author: User

  1. The memory is divided into functions and connections: Random memory: for storing The majority of CPU programs and data; ROM with bios: basic input and output system for storage devices; RAM on interface card: interface card needs to be used when large batches of input and output data are staged, such as video memory. When the CPU is manipulating them, they treat them as memory, treating them as a logical memory consisting of several storage units, which is what we call the memory address space.
  2. 2. in the 8086 machine, at any moment, the CPU will CS:IP point to the content as the instruction execution, after power-on or reset CS and IP is set to cs=ffffh,ip=0000h, that is, the ffff0h unit instruction is the 8086pc machine boot after the first instruction to execute.
  3. There is a DS register in 3.8086CPU, usually to hold the segment address to access the data, 8086 does not support direct data into the segment register, only one register to relay.
  4. 4.8086CPU provides in-stack and out-stack instructions, both the stack and the stack operation are in words, the stack address is SS:SP
  5. 5. The executable file consists of descriptive information and programs, which are derived from the assembly instructions and the defined data in the source program, while the descriptive information is mainly compiled and connected by the program to process the pseudo-instructions in the source program. Where the CPU starts executing the program, it can be specified in the source program as "End label".
  6. 6. Register: REG contains: Ax,bx,cx,dx,ah,al,bh,bl,ch,cl,dh,dl,sp,bp,si,disreg contains: Ds,ss,cs,es about Bx,si,di and BP: Only these four registers can be used for [] As long as the memory unit is addressed using the register BP, and no explicit given segment address, the segment address defaults to the SS
  7. 7. The vast majority of machine instructions are the instructions for data processing, processing is broadly divided into: read, write, operation. The data to be processed can be in three places: Internal CPU (register), memory, Port. Assembly language uses three concepts to express the location of the data: immediate count, register, segment address + offset address.
  8. 8. Examples of assembly instructions

Assembly Instructions

Control what the CPU is doing

Syntax descriptions in high-level languages

MOV ax,18

Send 18 into Register AX

Ax=18

MOV ah,78

The 78 is fed to the register AH

ah=78

Add ax,8

Add 8 to the value in register AX

Ax=ax+8

MOV ax,bx

Send data in register BX to register AX

Ax=bx

Add AX,BX

Adds the numeric values of AX and BX to the result that is present in AX

Ax=ax+bx

CPU with 9.16-bit structure

The operator can handle up to 16 bits of data at a time

the maximum width of the register is 16 bits

the path between the register and the operator is 16 bits

10.8086CPU method of giving physical address

paragraph address x16+ offset address = The intrinsic meaning of the physical address

when the CPU accesses memory, it adds a base address (segment address *16) and an offset address relative to the underlying address to give the physical address of the memory unit.

changes to CS,IP directives

in the In the CPU, the programmer is able to read and write the parts only registers, the programmer can control the CPU by changing the contents of the register . where the CPU executes the instruction is determined by the contents of CSandIP , the programmer can change cs, The contents of the IP to control the CPU execution of the target instruction.

How we changeCs,IPthe value? Obviously,8086CPUthe corresponding instructions must be provided. How do we modifyAXthe value in? can be usedmovdirectives, such asmov ax,123will beAxis set to the value in123, obviously, we can also set the value of other registers in the same way, such asmov bx,123,mov cx,123,mov dx,123and so on. In fact,8086CPUthe value of most registers can be usedmovinstructions to change,movinstructions are called routing instructions.

However,movdirective cannot be used to setCS,IPThe reason is simple, because8086CPUNo such feature is provided. 8086CPUto beCS,IPAdditional instructions are provided to change their values. Can changeCS,IPthe contents of the instructions are collectively referred to as transfer instructions(we'll look into it later .). We now introduce a simplest can be modifiedCS,IPthe instructions:jmp instructions.

If you want to modify CS,IP content, can be used as the "jmp Segment Address: Offset address " instructions to complete, such as

JMP 2ae3:3, after execution:cs=2ae3h,ip=0003h,theCPU will be from 2ae33h read instructions at the same place.

JMP 3:0b16, after execution:cs=0003h,ip=0b16h,theCPU will be from 00b46h read instructions at the same place.

The function of the "JMP segment Address: Offset address " directive is to modify CS with the segment address given in the instruction , offset address to modify IP .

If you want to modify only The contents of the IP can be completed as an instruction of " a valid register in jmp " , such as

JMP AX, before the instruction is executed:ax=1000h,cs=2000h,ip=0003h
After the instruction is executed:ax=1000h,cs=2000h,ip=1000h
JMP BX, before the instruction is executed:bx=0b16h,cs=2000h,ip=0003h
After the instruction is executed:bx=0b16h,cs=2000h,ip=0b16h

.Summary:

The segment address is stored in the 8086CPU segment register. When 8086CPU accesses memory, the segment register provides the segment address of the memory unit. The 8086CPU has 4 segment registers, where CS is used to store the segment address of the instruction.

CS holds the segment address of the instruction, andtheIP holds the offset address of the instruction.

8086 machine, at any moment, theCPU will CS:IP pointing to the content as an instruction execution.

8086CPU working process:

from CS:theIP points to the memory unit read instruction, the read instruction enters the instruction buffer;

IP refers to a downward instruction;

execution instructions. (Go to step 1and repeat the process)

8086COU provides transfer instructions to modify CS,IP content.

Chapter II Summary of registers

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