Mac and PHY

Source: Internet
Author: User
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The network adapter works on the last two layers of OSI, the physical layer and the data link layer.

 

The Physical Layer Chip is called Phy. The physical layer defines the electrical and optical signals, line statuses, clock baselines, data encoding, and circuits required for data transmission and receiving, and provides standard interfaces to data link layer devices.

 

The data link layer chip in an Ethernet Card is called a Mac controller. The data link layer provides addressing mechanisms, data frame construction, data error check, transfer control, and standard data interfaces to the network layer.

 

The relationship between MAC and PHY is that the PCI bus is connected to the Mac bus, the Mac is connected to the phy, And the PHY is connected to the network cable (of course, it is not directly connected, and there is also a pressure change device ), many NICs work together.

The interface for connecting PHY and Mac is defined by IEEE: MII/gigamii (Media independed interfade, media independent interface ). The MII interface controls all the data and data on the network.


On the day when I wrote the article, someone asked online: If the operating system does not load the NIC Driver, although the NIC is on the System Device Tree, but the NIC interface cannot be created, can the NIC actually receive data?
Below are my discussions on the Internet:

There are a lot of details here. I wrote about it based on the spec of the Intel Nic, and I want to write it as plain as possible, so I didn't deliberately use the terms in spec, in addition, although this article is about MAC/PHY, the optical port card (serDes) is similar.


1. after the PCI device is reset, it enters the d0uninitialized (non-initialized D0 status, refer to the PCI power management specifications). At this time, the Mac and DMA of the NIC do not work, phy works in a special low power status.


2. When the operating system creates a device tree, it initializes the device. The memory access enable or the I/O access enable bit of the PCI command register will be enable, Which is d0active. In this case, PHY/MAC is enabled.


3. The PHY should be able to receive data on the physical link when it is enabled. Otherwise, the PHY cannot establish a physical connection if it cannot receive rst/NLP. However, these packages are generally sent intermittently.


4. Drivers generally use registers to control the phy, such as automatically negotiating speed/duplex and querying the status of the physical link up/down.


5. After Mac is enabled, if there is no driver to set a single bit of the control register (CTRL. SlU
. After this setting, the PHY completes the self-negotiation, and the NIC will have a link change interruption, knowing that the physical connection has been linked up.


6. Even if the link has been up, Mac still needs a bit of the Enable receiver (rctl. rxen
), The packet can be received in. If the NIC is reset, this is 0, which means all packets will be directly dropped and will not be saved to the FIFO of the NIC. The old Nic uses this to turn off the reception before the driver exits. The dynamic configuration of Intel's latest Gigabit Nic sending and receiving queues relies on this bit. traffic must be switched off during reconfiguration.



7. No matter whether the driver is loaded or not, after a reset occurs, the MAC address in the ENI eepom will be written into the NIC's MAC address filter register,
The driver can modify this register. Modern NICs usually support many MAC addresses, that is, MAC addresses can be set by software. For example, Intel's Gigabit Nic supports 16 unicast
MAC address, but only one exists in the EEPROM. Others are claimed and set by the software.


8. however, if the driver is not loaded and the NIC is already on the Device Tree, the operating system completes Step 1-2 initialization. At this time, the NIC's PHY should work, but because no one sets the control bit (CTRL. SLU) to connect Mac and PHY, So Mac does not accept packets. This control bit is set to 0 again during reset.


9. PHY can be set to power-on and power-off by the software. The power-off status will not receive data except for the management commands. In addition, if PHY can work in smart power down mode, the link down state changes to power-saving.


10. some multi-port NICs share one PHY with multiple network ports. Therefore, if you set disbale to a certain network port in the bios, you may not turn off the power of the phy. In turn, you must also be careful when turning off the power of the phy.


11. To learn more about phy, you must be familiar with IEEE Ethernet protocols.

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