(Formerly known) go deep into the warning DE2-70's "error: Can't place pins assigned to pin location pin_ad25 (ioc_x95_y2_n1)" Warning warning

Abstract
DE2-70 beginners often encounter this warning message about how to determine the DE2-70's "error: Can't place pins assigned to pin location pin_ad25 (ioc_x95_y2_n1)? (SOC) (Quartus II) (DE2-70, but at the time, I have understood why I want to solve this problem (because I didn't understand it at the time). I will discuss it again in this article.

Introduction
Use environment: Quartus II 10.1 + DE2-70 (Cyclone II ep2c70f896cn)

This article will discuss the following topics:

1. "error: Can't place pins assigned to pin location pin_ad25 (ioc_x95_y2_n1)" refers to the meaning of interest loss.

2. What is dual-purpose pin?

3. What is nceo?

4. How to Use Quartus ii gui to set nceo to regular I/O pin?

5. How to Use Tcl to set nceo to regular I/O pin?

"Error: Can't place pins assigned to pin location pin_ad25 (ioc_x95_y2_n1)" refers to the meaning of interest loss

In the DE2-70, if SW [7] is used, the root terminal [1] DE2-70 user manual v1.08 is specified to pin_ad25 at pin assignment.

During peak hours, you will encounter the following warning messages:

 

In the (original partition) how to solve the DE2-70 of the "error: Can't place pins assigned to pin location pin_ad25 (ioc_x95_y2_n1)" of the primary partition information? (SOC) (Quartus II) (DE2-70) has been discussing the method of over-resolution, basically as long as the author can solve the problem, however, at the beginning, there was no such solution.

The help solution for the root us II is as follows:

 Can't place multiple pins assigned to pin location <Name> (<Name>)

--------------------------------------------------------------------------------
Cause: You assigned two or more pins to the specified location  ,  But the fitter cannot place all the pins in that location.
Action: If the conflict arises from location assignments in the current project  , Delete or change the location assignment of one or more of the pins. If the pin location assignments come from one or more imported design partitions  ,  Delete or change the location assignment (possibly using the virtual pin assignments) in the lower-level designs  ,  Re-generate the Quartus II exported partition file (s) (. qxp)  ,  And re-import. 

The general idea is that you have done pin assignment twice for pin_ad25 at the same time, which causes fitter to be unable to do P & R.

Usually, this warning message is generated because the pin assignment has been reset twice. However, naturally, we didn't just make a decision on our own.

Root router for schematic V1.1 DE2-70 [2]

In addition to sw7, The nceo also uses this pin.That is why sw7 and nceo both specify pin_ad25.

What is dual-purpose pins?

Root partition [3] Quartus II help, dual-purpose pins

 
Pins that can be used as I/O pins after initialization when processing ing SRAM-based devices. The number of dual-purpose pins available in all Altera devices supported by the Quartus II Software Defined T max3000And Max7000Devices depends on the device's configuration scheme.
 

We know that FPGA is basically structured by SRAM. before using it, we must change *. sof extends program can be used only after it is imported into FPGA. Therefore, FPGA retains some pins for programming. Once FPGA passes through program, these pins can be used as general I/O pins. These pins are dual-purpose pin, and the nceo was a dual-purpose pin.

What is nceo?

Root Cause [4] cyclone III Device Family pin connection guidelines description for nceo

 
Output that drives low when device configuration is complete.
 

Its connection guidelines is

 
During Multi-Device Configuration,This pin feeds a subsequent device's nce pin and must be pulled high to vccio by external10-KΩ pull-up resistor. During single device configuration and for the last device in Multi-Device Configuration,This pin can be left floating or used as regular I/O after configuration.
 

NCE Definition

Dedicated active-Low Chip enable. When NCE is low,The device is enabled. When NCE is high,Device is disabled.
 

Its connection guidelines is

In multi-Device Configuration,Nce of the first device is tied directly to Gnd while its nceo pin drives the nce of the next device in the chain. In single device configuration,NCE is tied directly to Gnd. the NCE pin must also be held low for successful JTAG programming of the device. If you are combining JTAG and as configuration schemes,Then the NCE shocould be tied to Gnd through10-KΩ resistor.
 

Each FPGA has two nce and nceo pins. In the multi-FPGA system, the nce of the first fpga is connected to Gnd, the nceo of the first fpga will be connected to the nce of the next fpga, so that the next FPGA will continue, it can be used as a general I/O pin or floating nceo. In FPGA alone, NCE is directly connected to Gnd. nceo can directly floating or use it as a general I/O pin.

In the DE2-70, because it is just a single FPGA, nceo does not work, so it is used as the input pin of SW [7].

How to Use Quartus ii gui to set nceo to regular I/O pin?

How can I determine the accuracy of "error: Can't place pins assigned to pin location pin_ad25 (ioc_x95_y2_n1)" in the DE2-70? (SOC) (Quartus II) (DE2-70)

How to Use Tcl to set nceo to regular I/O pin?

 
Set_global_assignment-name cycloneii_reserve_nceo_after_configuration"Use as regular Io"
 

Conclusion
In [7] myfpga, de0's vga_ B [0] pin assignment someone complained why Quartus II wants to default to make nceo programming pin, not regular I/O pin, it's really strange that people who design DE2-70 have to use the nceo pin, under the pin-foot strategy, nceo should not be used as the regular I/o PIN unless it is used in the case where the PIN is not used, in addition, nceo can only use FPGA alone. Other versions of terasic also have similar design. After analyzing the back-to-back principles, you can also use them on other versions.

Reference
DE2-70 user manual v1.08
[2] DE2-70 schematic V1.1
[3] Quartus II help, dual-purpose pins
[4] cyclone III Device Family pin connection guidelines
[5] alteraforum.com, dual purpose pins-nceo
[6] Quartus II help v10.1, dual-purpose pins page (device and pin Options dialog box)
[7] myfpga, de0 vga_ B [0] pin assignment has Signature

See also
(Original partition) How to Determine the partition information of the DE2-70's "error: Can't place pins assigned to pin location pin_ad25 (ioc_x95_y2_n1? (SOC) (Quartus II) (DE2-70)

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