GNU-makefle (2) Makefile file name, include, make

Reference: http://blog.csdn.net/haoel/article/details/2888

File name

Make [-f | -- file] [filename] for example, make-f mk1 mk1 contains a definition of makefile.

Include keyword

Similar to the C language. Place the content of the contained file in the current location as is.

Include a B c d e... abcde is the file name, separated by spaces or tabs. Note: Do not use tab before include. tab indicates that this is a command and will be executed in shell.

It is like the # include command of C/C ++. If no absolute or relative path is specified for the file, make will first search for it in the current directory. If no absolute or relative path is found in the current directory, make will also find it in the following directories:

1. If the "-I" or "-- include-dir" parameter exists during make execution, make will search for it in the directory specified by this parameter.

Make-I. Specifies to search in the current directory
2. If the directory <prefix>/include (generally:/usr/local/bin or/usr/include) exists, make will also find it.

This method is generally not used. External control is always troublesome.

3. Add-include filename in front to indicate that the error is ignored. If the file does not exist, no prompt will be prompted.

Makefile example:

# Include keyword, which is included by variables. # Include. mkfmymk =. mkf-include $ (mymk) edit: $ (objs) cc-o edit $ (objs) main. o: kbd. o: command. o: display. o: insert. o: search. o: utils. o: files. o :. PHONY: clean:-rm edit $ (objs)

A. mkf

Objs = main. o kbd. o command. o display. o insert. o search. o files. o utils. o

How make works:

The execution steps of GNU make are as follows: (similar to other make statements)

1. Read all makefiles.
2. Read other makefiles to be included.
3. Initialize the variables in the file.
4. Deduce hidden rules and analyze all rules.
5. Create dependency links for all target files.
6. Determine the targets to be regenerated based on the dependency.
7. Run the generated command.

Step 1-5 is the first stage, and step 6-7 is the second stage. In the first phase, if the defined variable is used, make will expand it to the position in use. But make will not be fully expanded immediately. make uses the procrastination strategy. If the variable appears in the dependency rule, it will only be used when the dependency is determined, variable is expanded within it.

GNU-makefle (2) Makefile file name, include, make