Grouping ting parallel applications (1)

Summary of Berkeley's learning experience in the "ting parallel applications" course PPT:

 

Lecture1: Introduction and Overview

 

Parallel objective motivation of Parallelism

1. In terms of hardware, the performance improvement of a single processor is subject to three barriers:

Power Consumption, memory and command-level concurrency (ILP). For details, refer to parallel introduction of James reinders http://www.builder.com.cn/video_intel/video_intel.shtml.

2. small is beautiful, "smallness within bigness", and puts forward the concept of divide and conquer. Executing a large job is equivalent to executing a group of related small jobs.

3. Future Trend of parallel hardware: Future general-purpose processors will be built from small (5-9 stage pipeline) energy efficient processing elements

4. At the same time, in software parallel programming, we must meet the following requirements: productively: programmer's time, time-to-market; efficiently: meeting performance targets that the hardware shocould be able to realize; correctly: software meets its functional specification.

 

How not to solve the problem

With the support of multi-core architecture, we have encountered the following possibilities and challenges in parallel programming:

1. Constantly modify and monitor the performance of the original code, but it often fails and is difficult to improve the performance.

 

 

 

2. Using a new parallel language for programming, there are currently no suitable applications in the 200 parallel languages.

 

 

 

3. Compile the code into parallel execution by writing a super compiler.

 

 

In the future, parallel programming is not about training programmers to learn how to write parallel programs. Rather, experts in various fields use parallel application frameworks to write applications.

 

Solution: Our approach

The software architecture-programming model and environment-Programming Language-compiler and debugger-hardware architecture is established on the premise of meeting the productivity efficiency correctness, the key lies in the design patterns and Pattern Language.

 

 

 

Example: CBIR