Implementation of sub-operation atomic in ARM architecture

The atomic operation of integers, for the atomic_t type, has always been mentioned in the book that the CPU architecture itself supports simple atomic operations, or provides the function of locking the memory bus, you can prevent data access during the operation.

Today, we suddenly thought that the ARM architecture itself does not provide the lock memory bus function, and there are no commands similar to atomic operations. How can we implement atomic operations? Have a lookCodeOriginally, interruption is disabled. Because the ARM architecture does not support the SMP architecture, disabling the interruption eliminates the possibility of code concurrency, thus achieving atomic operations.

In addition, the architecture above armv6 uses ldrex and strex commands to achieve exclusive access to a memory address, thus avoiding the operation prohibition of interruption. (From the instruction explanation, I guess this is true, but I don't know much about it)

• Ldrex {<cond >}< RD>, [<rn>]
This performs a load, then sets a monitor to "watch" the address
• Strex {<cond >}< RD >,< Rm>, [<rn>]
This performs a store and returns "success" in RD if no intervening access
Detected by the monitor.