Information Security System Design Foundation Fifth Week study summary

Source: Internet
Author: User

Architecture of the processor

ISA: The byte-level encoding of a processor-supported instruction and instruction is called its instruction set architecture Isa.

Y86 is an instruction architecture (ISA) Register, memory, condition code,PC, program state.

Halt: This command will terminate the execution of the instruction.

NOP: This is a placeholder instruction, it does not do anything, follow-up in order to achieve the pipeline, it has a certain role.

XXMOVL: This is a series of data transfer instructions where r represents a register, m represents memory, and I represents an immediate number. For example, the RRMOVL directive assigns the value of a register to another register.

OPL: Operation instructions, such as addition, subtraction and so on.

JXX: Conditional jump instruction, according to the following conditions to jump.

CMOVXX: Conditional delivery instruction, followed by XX is the condition. In particular, conditional delivery occurs only between two registers and does not transfer data to memory.

Call and Ret: Method invocation and return instruction. One will return the address into the stack and jump to the destination address. One will return the address into the PC and jump to the return address.

Push vs. Pop: in-stack and out-stack operations. Y86 exception

For Y86, there is a stat status code in the visible state of the program Ape, which identifies the state of the program execution. Y86 needs to be able to do some processing according to Stat. But for the sake of simplicity, the execution of the instruction will be stopped in addition to normal execution. In reality, there will be special exception handlers.

Y86 has four different status codes, AOK (normal), HLT (Execute Halt command), ADR (illegal address), and ins (illegal instructions).

Y86 program

The book gives a sample program to illustrate the difference between X86 and Y86, here LZ does not analyze these assembly instructions in detail, this kind of thing in the third chapter has done a lot of, in fact, the two are very similar, after all, Y86 is based on the structure of X86 yy out. The difference is that sometimes Y86 need two instructions to achieve the purpose of X86 an instruction can be achieved.

For example, Addl $4,%ecx in the X86 directive, because the ADDL directive in Y86 does not contain an immediate number, the Y86 needs to deposit the immediate number into the register, that is, using the IRMOVL instruction, and then using ADDL to handle the addition operation.

In general, Y86 is a X86 version of the compact that is designed to implement a processor in a simple structure that helps us understand the design and implementation of the processor.

1, CISC (Complex instruction Set Computing), RISC (reduced instruction-set computer), MIPS (Million instructions Per Second).

2, CISC encoding is variable length, IA32 instruction length can be 1~15;RISC encoding is fixed length, usually all instructions are encoded as 4 bytes.

3, in hardware design, the electronic circuit is used to calculate the function of bits (function on bits), as well as in various storage elements to store bits. Most modern circuit technologies use high voltages or low voltages on the signal lines to represent different bit values. To implement a digital system requires three main components: the combined logic of the function that computes the bits, the memory element that stores the bits, and the clock signal that controls the update of the memory element.

4. In general, processing an instruction includes many operations.

1) Fetch (FETCH): The reference stage reads the instruction from the memory, the address is the value of the program counter PC. Extracts the two four-bit portions of the instruction designator byte from the instruction, called Icode (instruction Code) and Ifun (instruction function).

2) decoding (decode): The decoding phase reads up to two operands from the register file, resulting in a value Vala Or/and valb.

3) Execution: During the execution phase, the arithmetic/logic unit (ALU) either executes the operation specified by the instruction (according to the value of Ifun), calculates the valid address of the memory reference, or increases or decreases the stack pointer.

4) Access (memory): The data can be written to memory or read from the memory during the visit. The value read is Valm.

5) writeback (write back): The write back stage can write up to two results to the register file.

6) Update PC (PC Update, program counter): Sets the PC to the address of the next instruction.

5, the instruction executes the procedure, takes out the instruction from the PC, then follows the above several steps to operate, repeats the cycle.

6. The processor never needs to read the status updated by the instruction in order to complete the execution of an instruction.

Resources: In-depth understanding of computer systems, reference sites:

http://www.tuicool.com/articles/Zv6v6n

Information Security System Design Foundation Fifth Week study summary

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