Input/Output Control Mode

Input/Output Control Mode
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Generally, if an external device needs to exchange data with the memory, it must use the CPU to execute the input and output commands and the memory read and write commands. Generally, there are five Input and Output Control Methods for CPU management peripheral devices: Program query, interrupt, DMA (Direct Memory Access), channel, and peripheral processor, the first two methods are implemented by software, and the last three methods are implemented by hardware.

 

1. Program Implementation

1. Program Query Method

The program query method requires the CPU to constantly use the command detection method to obtain the working status of peripherals. The data exchange between the CPU and peripheral devices is completely dependent on computer program control. Before information exchange, the CPU should set transmission parameters and length, and then start the peripherals; the peripherals are responsible for data transmission preparation. During the preparation time of the peripherals, the CPU can only wait until the peripherals are ready in addition to cyclic detection; the CPU does not begin to exchange information until the peripherals complete data preparation. This results in extremely low CPU running efficiency.

 

Features:

(1) The CPU operations and peripheral operations can be fully synchronized, and the hardware structure is relatively simple.

(2) The CPU running efficiency is extremely low.

 

In the current practical application, in addition to single-chip microcomputer, the program query method is rarely used.

 

2. interrupt mode

An interruption occurs when the host encounters an emergency and interrupts the program being executed. Instead, the host processes the emergency and continues executing the original program after the emergency is handled.

Strictly speaking, when an interruption occurs, the peripheral sends an "interrupt request", the CPU suspends its current program, and the program breakpoint address is protected, the interrupt handler entry address is sent to the register for an interrupt response. In turn, the interrupt handler is executed to complete data I/O, that is, interrupt processing. After the interrupt processing is completed, the CPU returns to the original task and continues executing the program from the pause. That is, the breakpoint address saved in the interrupt response is sent back to the instruction pointer register for the interrupt return operation.

 

Features:

(1) It saves CPU time and is an effective method for managing I/O operations.

(2) Compared with the program query method, the hardware structure of the program interrupt mode is relatively complicated and the service cost is relatively high.

 

The interruption method is generally applicable to services that appear randomly. Once requested, the service should be executed immediately.

 

3. DMA mode

Direct Memory Access (DMA) is a way of fully performing I/O switching by hardware.

 

Features:

(1) The DMA controller takes full control of the bus from the CPU. Data Exchange is directly carried out between the main memory and peripheral devices without going through the CPU, so as to transmit data at high speed.

(2) the data transmission speed is very high, and the transmission speed is limited by the Access time of the primary storage.

(3) compared with program interruption, This method requires more hardware and is suitable for mass data exchange between primary storage and high-speed peripheral devices.

 

Ii. Hardware Implementation

1. Channel Mode (IOP)

A channel is a processor with special functions, also known as an input/output processor (IOP). It shares some of the CPU functions and enables unified management of peripheral devices, transfers data between the peripheral device and the primary storage.

 

Features:

(1) the appearance of the DMA method reduces the CPU's control over I/O operations, significantly improving the CPU efficiency, while the appearance of channels further improves the CPU efficiency.

(2) This increase in efficiency is at the cost of adding more hardware.

 

2. Peripheral processing method (PPU)

The PeripheralProcessor Unit (PPU) mode is a further development of the channel mode. Basically, it is independent of the host, and its structure is closer to the general processor, or even the mini-computer. In some systems, multiple ppus are set up to undertake I/O control, communication, maintenance and diagnosis tasks. In a sense, such a system has become a distributed multi-machine system.

 

Features:

(1) The peripheral processor is basically independent of the host, which makes a qualitative leap in the computer system structure, from centralized functions to distributed systems with scattered functions.

(2) ability to analyze and handle complex tasks.

 

To sum up, the program query and program interruption modes are suitable for peripheral devices with low data transmission rates, while the DMA, channel, and peripheral processing modes are suitable for peripheral devices with high data transmission rates.