Introduction to low-voltage differential Linear Voltage Regulator

A low dropout regulator is a low-voltage differential linear voltage regulator, which is relative to a traditional linear voltage regulator. Traditional linear voltage regulators, such as 78xx series chips, require that the input voltage be 2 V higher than the output voltage ~ 3 V or above, otherwise it will not work normally. However, in some cases, such conditions are obviously too harsh. For example, the input and output pressure difference between 5 V and 3.3 V is only 1.7 V, which obviously does not meet the conditions. In this case, the power conversion chip of the ldos class is available.
LVS is a linear voltage regulator. A linear voltage regulator uses a transistor or FET running in its linear region to subtract excess voltage from the input voltage of an application and generate a regulated output voltage. The voltage drop refers to the minimum value of the difference between the input voltage and the output voltage required by the voltage regulator to maintain the output voltage above or below 100mV of its rated value. Positive output voltage
A low-voltage drop regulator typically uses a Power Transistor (also known as a transfer device) as a PNP. This transistor allows saturation, so the voltage regulator can have a very low voltage drop, usually around 200mV; in contrast, the voltage drop of a traditional linear voltage regulator using a compound power transistor is about 2 v. The negative output LDC uses the PNP as its transmission device, and its operation mode is similar to that of the PNP device of the positive output LDC.
The Newer Development uses a CMOS power transistor that provides the lowest voltage drop. With CMOS, the unique voltage drop through the voltage regulator is caused by the on resistance of the load current of the power supply device. If the load is small, the pressure drop generated by this method is only dozens of millivolts.
Dcdc means DC to DC (to) DC (conversion of different DC power supply values), as long as it complies with this definition can be called dcdc converter,
Including ldos. However, the general saying is that the device that implements DC-to-DC switch is called dcdc.
Low-voltage drop-down: low cost, low noise, low static current,
These are its outstanding advantages. It requires few external components, usually only one or two bypass capacitors. New LVS
The output noise is 30μv, PSRR is 60db, and static current is 6μa (Ti tps78001 reaches IQ = 0.5ua ), the voltage drop is only 100mV (Ti mass production of the so-called 1mV ). LVS
The main reason why the performance of the voltage regulator can reach this level is that the adjustment tube uses a p-Channel MOS, while the common line
A sex regulator uses a PNP transistor. The P-Channel MOS are voltage-driven and do not require current, which greatly reduces device consumption.
On the other hand, in a circuit using a PNP transistor, the output capability is reduced to prevent the PNP transistor from entering saturation.
The voltage drop between the input and output cannot be too low. The voltage drop on the p-Channel MOS is roughly equal to the output current and the on-resistance.
. Because the on-resistance of the MOS is very small, the voltage drop on them is very low.
If the input voltage is very close to the output voltage, it is best to use an LVS regulator to achieve high efficiency. Therefore, the lithium-ion
Most of the applications that convert the pool voltage to the 3 V output voltage use an LVS regulator. Although the battery energy is not used at least 10 percent
, The regulator can still ensure the battery time is long, while the noise is low.
If the input voltage is not very close to the output voltage, you need to consider using the switched dcdc. We should know from the above principle,
The input current is basically equal to the output current. If the voltage drop is too large, it consumes too much energy and the efficiency is not high.
The DC-DC Converter includes boost, step-down, lift/step-down, and inverse equal circuit. The advantage of DC-DC converter is high efficiency, can output large
Low Current and low static current. With the increase of integration, many new DC-DC converters only need a few external inductor and filter capacitor
. However, the output pulsation and switch noise of these power supply controllers are high and the cost is relatively high.
In recent years, with the development of semiconductor technology, surface-mounted inductors, capacitors, and highly integrated power control chips
The cost is decreasing and the volume is getting smaller and smaller. This is not required because a low-Resistance Transistor can output a high power.
External High-Power FET. For example, for 3 V input voltage, the nfet on the chip can be used to obtain the output of 5 V/2a. Secondly,
Small and medium power applications can use low-cost small packages. In addition, if the switch frequency is increased to 1 MHz, it can also reduce costs,
Small-sized Inductor and capacitor can be used. Some new devices also add many new features, such as soft start, throttling, PFM, or
PWM mode selection.
In general, dcdc must be selected for boost, and dcdc or LDC must be selected for Buck. In terms of cost, efficiency, noise, and performance
Comparison.
Major Manufacturers include Ti, NS, Maxim, LTC, intersil, And Fairchild;
The following are four main elements of an ldos:
Differential pressure dropout, noise, common mode/ripple rejection ratio (PSRR), and static current IQ, which are the four key data of ldos.
The product designer selects the ldos Based on the electrical performance requirements of the product load.
The ldos on mobile phones requires as little noise (ripple) as possible, and low static current for portable products without RF.
The operating conditions of the ldos are as follows:
Vin> = vdrop + Vout.
Generally, two external capacitors are required: CIN and cout, And the TA capacitor or MLCC is used.
Note: The LVS is a voltage regulator.