Reading ASM recently

1
One storage unit stores 1 byte, 1b, and 8 bit information.
1 byte (B) = 8bit
Address BusA cpu has n address lines, indicating that the address bus width is N, which can address 2 ^ n memory units.

Data Bus Transmit 1 byte, 1b, and 8 bit data with 8 lines.
Control bus

1.11 memory address spaceThe space composed of addressable units of the CPU.
All hardware is a memory address for the CPU.
2.1 registers
14 registers in 8086Ax, BX, CX, dx, Si, Di, SP, BP, IP, Cs, SS, SD, es, psw
   Four General registers ax, BX, CX, dx (16-bit) for compatibility with the previous generation CPU)

      It can be used as eight octal registers of AH, Al; BH, BL; ch, Cl; DH and DL.

8086 process data of two sizesEight bits are called bytes, and two eight bits are called words.
2.3 assembly instructions
MoV XX, xxx; can be a register or a value
Add XX, xxx; Same as above
 When an 8-bit register is used, the maximum bit is lost when the value exceeds 256.
 When an 8-bit register is used separately, there is no wool relationship with the 16-bit register. If Al exceeds 256, the highest bit will be lost instead of being carried into ah.

2.4 physical address
8086 has 20 address buses and the maximum addressable capacity is 1 MB. However, the Register only has 16 bits, so it can only address 64 KB.
Therefore, two 16-bit addresses (segment addresses, offset addresses) are used internally to synthesize 20-bit addresses through the address divider.
 Physical address = segment address * 16 (four shifts left) + offset address;
The reason is that 16 bits cannot represent 20 bits.
SectionThere is no segment in the memory, which is a concept in the CPU. The CPU cannot identify such a large area, so it is segmented.
Segment address * 16 = segment start position, must be a multiple of 16. The offset address is 16 bits, so the maximum size of a segment is 64 KB.
2.9-segment registerSegment register CS, SS, SD, es in section 8086
 CS  
Code segment register
 IP  
Instruction Pointer register
 At any time, 8086 regards Cs: IP point content as command execution..
The process of 8086 is simplified to: (IP address change first, and then execute the command .)
 1. Read the instruction from the memory unit directed to by CS: IP address. The read instruction enters the instruction buffer.
 2 IP = IP + the length of the read command to read the next command
 3
Execute the command and go to step 1 to continue
After the 8086cpu is powered on or reset (that is, when the CPU is just starting to work), Cs and IP are set to cs = ffffh, IP = 0000 h,

That is, when the 8086pc machine is started, the CPU reads the command from the memory ffff0h unit and runs the command,
The command in the ffff0h unit is the First Command executed after the 8086pc is started.
How to change the value of CS and IPWhat about using mov like other registers?
Error. JMP commands (Transfer commands) are used in 8086 ).
Method 1: JMP
Segment address value: Offset address valueIn this way, the given segment address value is changed to the CS register, and the offset position value is changed to the IP register.
Method 2: If you only want to modify the value in the IP Address RegisterJMP
A valid registerModify the IP register using the value in the register
2.12 code segment
A command is placed in a memory with a sequential address in multiples of 16 at the starting position. All we need to do is designate Cs: IP address as the starting position of the code segment.

Debug
R view and modify registersD. view the content in the memory.

E. modify the content in the memory.U translates machine commands in memory into assembly commands
T executes a machine commandA writes a machine instruction in memory in the format of assembly instruction

R command to view you and modify the register value
 
After searching for half a day, I finally found an address with a machine code not 0000.

D segment address (both can use segment registers to represent the value): Starting from the offset address
(End of offset address)To view memory content, (The default value is 128 memory units ). When the end of the segment is reached, it is no longer displayed.

 Use segment D address: Offset position
Continue to use d to display the value of 128 consecutive memory units.

Motherboard date

Segment e address: Offset addressXX YY
ZzThe data to be modified is directly written below.

If you do not want to write data, press enter to start data modification. After the first entry is modified, Press space to continue the modification. Press enter to end the modification. No matter what you press, it will be modified.

 It can be a string.

 
U segment address: Starting from the offset address
(End of offset address)To view the memory content and translate it into an assembly language.

T execute the machine command (current Cs: IP address pointed)

Segment A address: the offset address starts from this address. It is input by assembly and automatically enters the machine code.

 G segment address: the offset address directly starts code debugging from an address.

3. Memory Access

The 16-bit registers in the CPU store one word, and the memory unit is a byte unit. Therefore, the two memory units store one word.

Concept: A memory unit that stores a font data (16-bit). It consists of two consecutive address memory units. The memory unit of a high address is a high byte of the font data, the memory unit of the low memory address places the low byte of the font data.

Conclusion: any two consecutive memory units N and n + 1 can be regarded as two memory units, it can also be seen as a low byte unit and high byte unit of a word unit whose address unit is N.

The ds segment register is used to store the segment address of the data to be accessed.

The mov command can read data from memory into registers.

Similar to mov ax, [0] Where [0] is the offset address of the memory address, and the segment address is the value in the current DS register.

At that time, 8086 of the design did not support directly moving data to the segment register. It could only be implemented through one intermediary register.

3.4add mov sub

MoV register, Data

MoV register, register

MoV segment register, register

MoV register, segment register

MoV memory unit, register

MoV register, memory unit

MoV memory unit, segment register

MoV segment register, memory unit

Stack 3.6

Push to stack and pop to stack

SS: SP points to the top element of the stack. When the stack is empty, it points to the next element at the bottom of the stack.

The data is not modified after the stack exit operation. The data of this address is modified only when the next stack entry is performed.

There is a register on the stack size, so we may pop or push too many elements, and the stack top stack bottom may cross the border and modify other data. Dangerous.

Stack segments are also defined in the program, with a maximum of 64 K. That is because when the stack is empty, the SP value is 0000 h, and the sp value is 0000 h when the stack is full. The next operation will loop and overwrite the previous data.

4.2 pseudoinstructions

Segment name segment... Segment name ends
 Use them in pairs to define a segment.

The end sign () indicates the entry point of the program, indicating the end of the entire program.

Assume segment register: the segment name generally corresponds to the relevant register ds, Data Segment SS, stack segment CS, and code segment

--- Each variable identifier defined in the Data Segment actually represents an offset (also known as a valid address), which is combined with the data segment value to point to a memory address. In a program, the assume pseudo command is used to specify a default segment address. Once you specify the segment name of a data segment to a segment register (such as assume
 
DS, data1). After that, when you use the variables defined in this data segment (data1), the compiler automatically associates it with this segment register (DS) the CIDR Block Value (indicating a CIDR Block) is used in combination. ---

The program returns mov ax, 4c00h int 21 h

++

Assume register: segment name

Segment name segment

DW definition data

Start label assembly code

MoV ax, 4c00h

Int 21 h

Segment name ends

End start label

++

Debug single-step debugging. debug xxx.exe uses u to view the assembly code, uses T single-step tracking, and uses P to execute int 21.

[BX] indicates that the default segment address is stored in DS (other segment registers can also be specified), and the offset address is stored in two memory units in BX.

INC plus 1 command

Loop label
After the loop body is executed, first run CX -- and then judge the value in CX. If the value is not 0, the program segment after the label is executed. In general, the number of cycles stored in CX

In assembly languages, data cannot start with a letter... So 0 ffffh.

In the compilation phase, add ax, [0] will be treated as add ax, 0. We need to store 0 to BX, write add ax, [BX], or directly specify add
Ax, DS: [0].

Add ax, DS: [BX] add ax, SS: [BX] add
Ax, CS: [BX] Here DS:, SS:, CS: Is the segment prefix

DW (define word) defines font data

Use the end label to let the program find the entry point. Of course, the label must be placed at the beginning of the program.

Separate data, stacks, and codes in different segments.

How to access it?

First, obtain the segment address, mov ax, and segment name.

Assign value to segment registerMoV ds, ax

Then you can use the offset to obtain and edit the data in other segments. Add DS: [5], ax

7. More flexible memory address locating methods

And and or, and use and to convert the case. Pay attention to the laws of binary form.

Segment register: [bx + digit] segment register: digit [BX] segment register: [BX], Digit

DS: [bx + 200] = DS: 200 [BX] = DS: [BX], 200

What is the significance of this? It provides convenience for advanced languages to implement arrays.

Si and Di, which are two registers similar to the Bx function, cannot be decomposed into two 8-bit registers.

Segment register: [bx + Si][Bx + DI]
[BX] [Si][BX] [di]

You can also add a [BX]. value [Si]Value [BX] [Si] [BX] [di]. Value
 [Bx + Si + value]

I am going to, for multi-layer loops, we need to remember the value of the outer Cx. We can store it in registers, but the registers are limited. we store it in the inner storage units, which is confusing and complex, therefore, we generally store the Cx on the previous layer in a stack segment. Every time before the lower-level cycle, push, after the loop pop recovery can be done.

BX, Si, Di, DP can appear in [] of memory unit addressing, and only two can appear, and can only be BX, Si or BX, Di or DP, Si or DP, di. It is strange that DP. When the segment register is not explicitly used, the segment address takes the value in SS instead of the default DS of BX.

The representation of the data location in the assembly language is 1, immediate number, which exists in the Instruction Cache and is directly given in the assembly language 2, register 3, segment address (SA) and the offset address (EA)

How does one explain whether the current operation is a word or byte?

Apart from operating on eight-bit registers or sixteen-bit registers,

You can also use the word PTR or byte PTR operator to describe it.

MoV word ptr ds: [BX], the memory unit of 1 operation is one word UNIT

MoV byte ptr ds: [BX]. The memory unit for 1 operation is one byte unit.

Div division command

There are 8 and 16 bits in the register or memory unit.

The number of divisor digits is twice that of the divisor. When the divisor is 16 bits, it is stored in ax. If it is 32 bits, it exists in Dx and ax.

When the divisor is 8 bits, the quotient exists in Al, the remainder exists in AH, And the logarithm is 16 bits, the quotient exists in ax, and the remainder exists in dx.

Dd defines DWORD data, which occupies 2 words

DUP defines duplicate data

Data Type count DUP (data)

DD 3 DUP (100001 H)

DW 3 DUP ('qw ')

DB 3 DUP (0)

The IP address or csip command only modifies the transfer within the IP address segment. Meanwhile, the csip inter-segment transfer can be divided into short transfer and near transfer.

Supports unconditional jump to JMP, conditional jump, loop, interrupt, and process.

Operator offset to get the offset position of the label

Short transfer in JMP short label segment near transfer in JMP near PTR label (Address) Segment
In fact, offset is used to indicate the position to jump. IP = IP + offset. Only IP addresses are modified.

Inter-segment transfer and remote transfer of JMP far labels

JMP 16-bit register IP = 16 register value

JMP word PTR memory unit address the memory unit stores an address, which is the transfer offset address.

Jmp dword ptr memory unit address (Inter-segment transfer) High address is segment address, low address is offset address

Conditional loop jcxz is the offset used, segment transfer-127 ~ 128

If the jcxz label is Cx = 0, it will jump to the label.

The loop label is also short transfer. Each operation first removes CX by one, and then determines whether CX is 0.

Dec auto-Subtraction

The significance of shift-based transfer is that the program is not easy to crash.

Call and RET commands

RET pushes the first data in the stack (SS: SP) to the IP address.

Retf records the top data in the stack to the IP address, and the second data to the CS

The call label is equivalent to the push IP address first, and then the JMP near PTR label.

The jump between call far PTR label segments is equivalent to push CS, push IP, JMP far PTR Cs: IP

Before executing the command, add the IP address and command length. Therefore, the above call is like this. When pushing an IP address, the IP address is added with the instruction length.

The call 16-bit register is equivalent to push IP, mov IP, and register.

The call word PTR memory address contains the transfer location in the memory address. Push the IP address first, and then JMP word PTR memory address

The call dword ptr memory address contains the transfer location in the memory address. First push CS, push IP, then JMP DWORD
PTR memory address

Subroutine framework: call subroutine label, RET after completion of the subroutine. Call, the next sentence of the IP into the stack, after the completion of the subroutine stack.

Mul multiplication command, which must be 8 bits multiplied by 8 bits, or 16 bits multiplied by 16 bits.

The 8-bit is put in AH by default, and the other is in registers or memory, and the 16-bit is put in ax by default. The 8-bit result is placed in ax, the 16-bit result is placed in dx, and the position is placed in ax.

Returns the pass and value of a parameter.

Subprogram start: register used in subprograms into the stack

Subroutine content

Register output stack used in subroutine

Return (Ret, retf)

When using Div, Division overflow may occur.

The flag register psw has 16 bits, among which 0cf, 2pf, 4AF, 6zf, 7sf, 8tf, 9If, 10df, and 11of have special functions.

6zf 0 flag, 0, 0 is 1, 0 is 0.

2pf indicates the parity flag, and determines whether the number of 1 is an even number.

7sf is the symbolic flag, and whether the result is negative.

0 CF indicates the carry flag, which is not affected by the unsigned number INC and loop.

11of indicates the overflow flag.

ADC bit addition ADC processes data object 1 and Data Object 2

Function processing data object 1 + Processing Data Object 2 + CF Big Data addition Process = low + low, high + low carry

SBB bitwise subtraction SBB processes data object 1 and Data Object 2

Function processing data object 1-data object processing 2-cf is used to process larger data.

CMP comparison is equivalent to subtraction of two numbers, but only affects psw registers.

A transfer instruction based on the number of unsigned values. Je is equal to, JNE is not equal to, ja is greater than, JNA is not greater than, JB is less than, JNB is not less

10df Direction Flag, which controls the direction of Si and Di in the string operation. DF = 0, increasing at a time, df = 1, decreasing

String operation movsb sends a byte ES: Di to the specified position DS: Si, then increments or decreases Si, di according to DF

Movsw sends a word to a specified position, and then Si and di increase or decrease twice

String operations are generally used with rep. Rep movsw indicates that movsw is executed each time, and then loop and loop for CX times.

S: movsw

 Loop s

Set the DF bit to ClD to 0 and STD to 1.

Pushf and popf apply the value of the Mark register to the stack and the output stack.

In case of internal interruption, Division overflow, one-step execution, int0 command execution, int Command Execution

The interrupt vector table stores the entry location of various interrupt handlers. An item occupies two characters, including the high-address segment address and the Low-position offset address.

Interruption Process

1. Get the interrupt type

2. Mark Register into Stack

3. Set the flag register TF, if to 0

4. CS content into Stack

5. IP content into Stack

5. The slave memory address is
 Read the entry location of the interrupt program in two cell lines: interrupt type code * 4 and interrupt type code * 4 + 2, and set the IP address and CS

Abbreviated

1. Obtain n

2. pushf

3. If = 0, TF = 0

4. Push CS

5. Push IP

6. (IP) = N * 4, (CS) = N * 4 + 2

Preparation of interrupt handling program

1. Save the registers used 2. process the interrupt 3. Recover the registers used 4. Use the iret command to return

Install the interrupt handler, copy the code to a safe place, and get the address to the corresponding location in the interrupt vector table. If the chunkoff code is N, It is the N * 4 release segment address, and the N * 4 + 2 release offset address.

After executing a command, if the CPU detects TF = 1, it will be interrupted in one step and the interrupt processing program at will be called. In some cases, the system does not immediately respond to the interruption. For example, after the data is stored in the SS register.

Int causes the interrupt process, and the code is broken in the int.