Section 1 electrical layer design

One of the most important advantages of a Multi-board over a common double or single-board is that the signal lines and power supply can be distributed on different board layers to improve signal isolation and anti-interference performance. The inner electrical layer is a copper layer, which is divided into several isolated areas. The copper film in each area is connected to a specific power source or ground wire through a passing hole, thus simplifying the wiring of power supply and ground network, at the same time, the internal resistance of the power supply can be effectively reduced.

11.4.1 internal electrical layer design settings

The inner electrical layer is usually the whole copper film. When the pad with the same network name as the copper film passes through the inner electrical layer, the system automatically connects it with the copper film. You can set the connection mode between the PAD/pass hole and the inner electrical layer, and the safe spacing between the copper film and other pad that do not belong to the network in the power plane clearance option. Select [design]/[rules ...] Command, click the manufacturing option, where the power plane clearance and power plane connect style options are related to the inner layer, the content is described as follows.

1. Power plane clearance

This rule is used to set the safe spacing of the inner electrical layer. It mainly refers to the safe spacing between the Solder Pad and the inner electrical layer without network connection, as shown in 11-11. During manufacturing, the copper film around the pad without network connection to the inner electrical layer will be corroded when it passes through the inner electrical layer, the size of the corroded ring is the value set in this constraint.

 

2. Power plane connect Style

This rule is used to set the form of the pad and the inner electrical layer. It mainly refers to the form of welding pad with a network connection with the inner electrical layer and when the passing hole is connected to the inner electrical layer. 11-12.

Click properties to bring up the rule setting dialog box, as shown in 11-13. The left side of the dialog box shows the applicability of the rule. In the rule attributes drop-down list on the right, you can select the Connection Methods: Relief connect, direct connect, and no connect. Direct Connect means direct connection. When the pad passes through the inner electrical layer, it does not corrode the surrounding copper film. The pad is directly connected to the inner electrical layer copper film. No Connect means no connection, that is, the pad with the same name as the copper membrane network will not be connected to the inner electrical layer. The designer generally uses the system's default relief connect connection form, as shown in the dialog box 11-13 for setting the rule.

This form of pad connection maintains a connection with the inner electrical layer through conductor extension and insulation gap, where the width of the conductor exit is set in the conductor width option; the conductor outlet option selects the number of conductor exits, you can select 2 or 4; the expansion option sets the width of the conductor extension; the air-gap option sets the width of the insulation gap.

11.4.2 inner electrical layer Segmentation Method

In the previous sections of this chapter, we have introduced the choice of multilayer structure, the establishment of the inner electrical layer, and the related settings. In this section, we will mainly introduce the method and steps for separating the inner electrical layer of a multilayer, for your reference.

(1) Before dividing the inner electrical layer, you must first define an inner electrical layer. This is already described in the previous chapter. Select [design]/[split planes ...] Command to bring up the inner electrical layer split dialog box, as shown in 11-14. In this dialog box, the current split planes column specifies the area where the inner electric layer has been split. In this example, the inner electrical layer is not split, so the current split planes column shown in Figure 11-14 is blank. The add, edit, and delete buttons in the current split planes column are used to add new power areas, Edit Selected networks, and delete selected networks respectively. The show selected split plane view option at the bottom of the button is used to set whether to display the selected inner electrical layer split area. If this option is selected, the thumbnail of the network area divided by the area in the inner electric layer is displayed in the box below it, the pins, pad, or cables with the same name as the Intranet electrical layer network are highlighted in the thumbnail. If this option is not selected, the cables are not highlighted. Show net for option. Select this option. If the network is specified for the inner electrical layer when the inner electrical layer is defined, the line and pins with the same name as the network are displayed in the box above this option.

(2) Click the Add button to bring up the inner electrical layer split Setting dialog box from 11 to 15.

In the dialog box shown on November 15, track width is used to set the line width when the border is drawn. It is also the insulation gap between different network areas on the same inner electrical layer, therefore, we usually set the track width to a relatively large value. We recommend that you enter the unit when entering the value. If only a number is entered and no unit is entered, the unit in the current PCB editor is used by default.

The layer option is used to set the specified split inner electrical layer. You can select power And Gnd inner electrical layer. In this example, multiple voltage levels exist, so you need to split the power internal electrical layer to provide different levels of voltage for the components.

The connect to net option is used to specify the network connected to the partitioned area. The inner electrical layer is usually used for power supply and local network layout. However, you can see from the connect to net drop-down list that the entire inner network can be connected to the signal network for signal transmission, but the general designers do not. The signal voltage and current required by the signal are weak, and the requirement on the wire is small, while the power supply current is large, which requires less equivalent internal resistance. Therefore, signals are routed at the signal layer. The inner electrical layer is used for power supply and local network connections.

(3) Click the OK button in the inner electric layer split Setting Dialog Box in Figure 11-15 to enter the network area border drawing status.

When drawing the inner electrical layer border, you usually hide the information of other layers and only display the edited inner electrical layer for easy draw of the border. Select Tools and preferences ...] Command to bring up the dialog box shown in 11-16. Select the display option, and then select the single layer mode check box, as shown in 11-16. In this way, all layers except the current working layer power are hidden, and the display effect is 11-17.

When dividing the inner electrical layer, because all the pins and pad of the network are included in the split area, you usually need to know the distribution of pins and pad with the same name as the power network, for segmentation. In the left-side browse PCB tool, select a VCC Network (as shown in 11-18) and click the select button to enable and select the network.

As shown in Figure 11-19, after the VCC network is switched on, the Solder Pad and pin labeled as VCC are compared with those labeled as other network cables.
After selecting these network pad with the same name, you can

Pad is included in the area. In this case, these power networks can be directly connected to the inner electrical layer through the pad instead of through the signal layer connection.
(4) Draw the separate area of the inner electric layer.

Select [design]/[split planes ...] Command to display the inner electrical layer separation dialog box shown in 11-14, click the Add button, and the inner electrical layer separation Setting Dialog Box shown in 11-15 is displayed. Select the 12 V network, click OK, And the cursor changes to a cross shape. Then, the inner electrical layer can be split.

When drawing the border line, you can press SHIFT + Space key to change the corner shape of the line, or press the tab key to change the attribute of the inner electrical layer. After a closed area is drawn (the start and end points are re-merged), the system automatically displays the inner electrical layer split dialog box from 11 to 20. In this dialog box, you can see an area that has been split, 11-21 is displayed on the PCB editing page.

After adding the inner electrical layer, enlarge a 12 V pad and you can see that the pad is not connected to the wire (11-22 (), however, a "+" icon appears on the pad, indicating that the pad has been connected to the inner electrical layer.

Switch the current working layer to the power layer, and you can see the connection status of the pad to the inner electrical layer. Since the inner electrical layer is usually the whole copper film, the parts shown around the pad in Figure 11-22 (B) will be corroded during the production process. It can be seen that the Gnd and the inner electrical layer are insulated.

After 12 V zones are added to the inner power layer, you can also add other networks as needed. That is to say, the entire inner power layer is divided into several different isolated zones, each region is connected to a different power supply network. The final result is 11-23.

After dividing the inner electrical layer, You can edit and delete the inner electrical layer network in the dialog box shown in 11-20. Click the edit button to bring up the inner electrical layer attribute peer box shown in 11-15. In this dialog box, you can modify the boundary width, inner electrical layer and connected network, but you cannot modify the boundary shape. If you are not satisfied with the border direction and shape, you can only click the delete button to re-draw the border; alternatively, you can run the [edit]/[Move]/[split plane vertices] command to modify the inner electrical layer boundary. You can change the boundary shape by moving the control points on the boundary, as shown in 11-24. Click Yes in the displayed dialog box to complete the re-painting.

11.4.3 basic principle of inner electrical layer Separation

After dividing the inner electrical layer, this section introduces several problems that need to be paid attention to when dividing the inner electrical layer.

(1) When drawing different Network Area Boundaries in the same inner electrical layer, the boundaries of these areas can overlap, which is also a common method. In PCB production, the boundary is the corrosion part of the copper film. That is to say, an insulating gap separates the copper film with different network labels, as shown in 11-25. This not only makes full use of the copper film area of the inner electrical layer, but also does not cause electrical isolation burst.

(2) When drawing the border, try not to allow the border through the pad of the area to be connected, as shown in 11-26. Because the boundary is the copper film that needs to be corroded during the PCB production process, the connection between the pad and the inner electrical layer may occur due to the production process. Therefore, when designing a PCB, try to ensure that the border does not pass through a pad with the same network name.

(3) When drawing the boundary of the inner electrical layer, if, for objective reasons, it is impossible to include all welding discs of the same network, the pad can also be connected through the signal layer cabling. However, this situation should be avoided in the practical application of multiple layers. Because if the pad is connected to the inner electrical layer by means of signal layer cabling, it is equivalent to a large electrical resistance (signal layer cabling resistance) it is in series with a small resistance (internal copper film resistance). The important advantage of using a multi-layer board is to effectively reduce the line impedance by connecting the power source and ground through a large area of copper film, reduces potential offset caused by PCB grounding resistance to improve anti-interference performance. Therefore, in actual design, try to avoid connecting the power network through a wire.

(4) the local network and power supply network are distributed in different inner electrical layers to achieve better electrical isolation and anti-interference effects.

(5) For SMD components, you can place a pad or a hole at the pin to connect to the inner electrical layer, or from the pin

Lead a very short wire (the lead should be as short as possible to reduce the line impedance), and place the pad and the hole at the end of the wire to connect, as shown in 11-27.

(6) Placement of decoupling capacitors. As mentioned above, 0.01 μF decoupling capacitor should be placed near the chip, and 10? F or a larger filter capacitor is used to filter out the high-frequency interference and ripple in the circuit, connect to the Chip Pin with the shortest short wire, and then connect to the inner electrical layer through the pad.

(7) If you do not need to split the inner electrical layer, you can directly select to connect to the network in the Properties dialog box of the inner electrical layer. You no longer need the inner electrical layer separation tool.