STM32 the position of the interrupt vector table, redirect



"Lanmanck Original"

This article has already said STM32 's start-up process:

http://blog.csdn.net/lanmanck/article/details/8252560

We also know how to jump to the main function, then, after the interruption, then how to run to interrupt the entry address.

As you can see from stm32f10x.s, a whole bunch of interrupt response functions have been defined, which is the interrupt vector table, designator __vectors, which represents the interrupt vector table entry address, for example:

Area RESET, DATA, READONLY; Defines a read-only data segment, which is actually in the code area (assuming STM32 starts from flash, this interrupt vector table start address is 0x8000000)
EXPORT __vectors
IMPORT Os_cpu_systickhandler
IMPORT Os_cpu_pendsvhandler

__vectors DCD __initial_sp; Top of Stack
DCD Reset_handler; Reset Handler
DCD Nmi_handler; NMI Handler
DCD Hardfault_handler; Hard Fault Handler
DCD Memmanage_handler; MPU Fault Handler
DCD Busfault_handler; Bus Fault Handler
DCD Usagefault_handler; Usage Fault Handler

This vector table writing is fastidious, with the hardware one by one correspondence can not be confused, the CPU to find the entry address on it, the bin file at the beginning is their address, reference manual RM0008 10.1.2 section can see the arrangement.

We combine the characteristics of cortex-m3, he power up after the boot pin to determine the PC location, such as boot set to flash boot, the PC jumps to 0x08000000 after booting. At this time the CPU will first take 2 addresses, the first is the top of the stack address, the second is to reset the exception address, so there is the above wording, so jump to Reset_handler.

So what is the actual address of this reset_handler? How much is the following heap for example Nmi_handler address? How did the interruption happen to this address? The following is explained.

1, we can through the anti-always know these entry address, see the project Map file can be seen, this address and Keil inside set Target->flash start address is closely related to, in fact, we do not need to care about, let compiler allocation, interrupt vector table put is their address.

2, compared to the ARM7/ARM9 kernel, the CORTEX-M3 kernel is fixed the position of the interrupt vector table and the starting address is changeable.

3, into the C language will be configured nvic,nvic_setvectortable () inside can configure the interrupt vector table start address and offset, mainly to tell the CPU whether the vector table is in Flash or RAM, the offset is how much. For example, set to within Flash, the offset is the burned-in program address, which can be set in Keil target. This way the CPU knows the entry address.

4, after the interruption, the CPU to find the interrupt vector table address, and then according to the offset (seat) and then find the interrupt address, so jump over.

Let's cut a diagram to illustrate the map file:

The corresponding bin file, see if the above address is placed:

Obviously, 200039C0 is the top address of the stack, and 08006F21 is the Reset_handler address.

How to locate. Take the example of 0x20000000

1, Keil set Ram start for 0x20000100, we put interrupt vector table in 0x20000000~0x20000100, other to program with

2, set nvic_setvectortable (nvic_vecttab_flash,0);

3. Copy the interrupt vector table to 0x20000000 when jumping to C