The basic knowledge of assembly language learning notes (ii)

A Register (CPU operating principle)

The CPU is composed of the device, controller, register and so on. In the CPU, the operator is processed, the registers are stored for information, the controller controls various devices, and the internal bus connects the various devices to transmit data between them.

The number of different CPU registers, the structure is not the same.

8086CPU has 14 registers: AX, BX, CX, DX, SI, DI, SP, BP, IP, CS, SS, DS, ES, PSW.

The 8086CPU ax, BX, CX, DX Four registers can be divided into two 8-bit registers to use:

Ax:ah and Al;

Bx:bh and BL;

Cx:ch and CL;

Dx:dh and DL;

Two The storage of the word in the register.

1. Byte: A byte consists of 8 bits, which can be stored in a 8-bit register.

2. Word: A word consists of two bytes, divided into high byte and low byte.

In 16-bit registers, the AH store is 8 bits high, and Al stores a low 8-bit.

Three A few common assembly instructions

Assembly Instructions	The action to complete
Mov Ax, 18	Send 18 into Register AX
Mov ah,78	The 78 is fed to the register AH
Add Ax, 8	Add 8 to the value in register AX
Mov AX,BX	Data in register BX is fed into ax
ADD AX, BX	Add data from AX and BX, and the result exists in AX

Note: Directives are case insensitive ;

For example:

On a machine with 32-bit registers, the result is: 1044C

However, there will be overflow on 8086, and a 16-bit machine is simulated for 044c,debug.

Four CPU with 16-bit structure

Characteristics:

1. The operator can process up to 16 bits of data at a time.

2. The minimum width of the operator is 16 bits.

3. The path between the register and the operator is 16 bits.

The most common 16-bit machine: 8086CPU.

The 8086CPU has a 20-bit address bus that can deliver 20-bit addresses with an addressable capacity of 1MB. From the internal structure of the 8086, if the address from the internal simple, then it can only send out 16-bit address, the performance of the addressable capacity is only 64KB.

(1) The relevant parts of the CPU provide two 16-bit addresses, one is called the segment address, one is called the offset address;

(2) The address and the offset address are fed into a part called the address adder via the internal bus;

(3) The address adder synthesizes two 16-bit addresses into a 20-bit physical address;

(4) The address adder feeds the 20-bit physical address into the input-output control circuit via the internal bus;

(5) The 20-bit physical address is transmitted to the memory by the address bus.

The address adder uses the Physical address = Segment Address *16+ offset address to synthesize the physical address with the segment address and offset address.

So 8086CPU when accessing memory, it is necessary to provide the segment address of the memory unit by the relevant part, and the offset address, and feed the address adder to synthesize the physical address.

8086CPU has four segment registers:

CS, DS, SS, ES.

Five CS and IP

CS is the code segment register, and the IP is the instruction pointer register.

In the 8086PC machine, the content of M,ip in CS is n,8086cpu will start from memory m*16+n unit, read an instruction and execute.

8086CPU the process of reading and executing an instruction.

1. Initial state: Cs:2000h,ip:0000h. The CPU reads the instruction execution from the memory 2000h*16+0000h.

2. The contents of the Cs,ip are fed into the address adder, which is done by the address adder:

Physical Address = Segment Address *16+ offset address

3. The physical address is fed into the input-output control circuit by the address adder.

4. The input/output control circuit sends the physical address 20000H to the address bus.

5. The machine instructions stored from the memory 20000H unit are fed into the CPU via the data bus.

6. The input/output control circuit feeds the machine instruction into the instruction buffer.

7. After reading an instruction, IP automatically increases. So that the CPU can read the next instruction.

Modify CS, IP content: You can use the "JMP segment Address: offset Address"

Assembly Language Basics Learning Note (ii)