The calculation of signed number in FPGA

In the FPGA design, all arithmetic operators are performed according to the unsigned number. Recently used FPGA to do a signed calculation, to record

1. If the signed number calculation is to be completed, the to and subtraction operations can be done by means of a complement of unsigned additions. However, in the calculation of the number of bits to consider the limit, whether in addition or subtraction, the result of the number of digits than the original data, a bit more,

This calculation will not occur when the quantum error.

Example1:

Module Signed_yz
(
Input Clk,rst_n,
Input signed [7:0]data,
Input signed [7:0]DATB,
Output signed [8:0]DATC
);
Assign DATC=DATA+DATB;

Endmodule

Simulation result diagram:

2. For multiplication operation, the unsigned number directly adopts the "*" operator;

The signed number operation can be handled by defining the output as signed. The multiplication of signed numbers is accomplished by the "*" operator.

Example2:

Module Signed_yz
(
Input Clk,rst_n,
unsigned data
input [7:0]udata,
input [7:0]UDATB,
Output [15:0]UDATC,
Signed data
Input signed [7:0]data,
Input signed [7:0]DATB,
Output signed [15:0]DATC

);

Assign UDATC=UDATA*UDATB;
Assign DATC=DATA*DATB;

Endmodule

From its RTL chart, you can see that the multiplier is labeled as:
"Signed", for the signed number multiplier.

Simulation result diagram:

The above is the number of symbols in the FPGA calculation, record their own learning process, but also for everyone to learn.

The calculation of signed number in FPGA