Write with me Makefile (iii) _makefile

Source: Internet
Author: User

General Statement of Makefile
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First, what's in the makefile.

The makefile contains five things: explicit rules, obscure rules, variable definitions, file instructions, and annotations.

1, explicit rules. Explicit rules explain how to generate one or more of the target files. This is clearly indicated by the Makefile writer, the file to be generated, the file's dependent file, the generated command.

2, obscure rules. Because our make has the function of automatically derivation, the obscure rules allow us to write makefile in a rough way, which is supported by made.

3, the definition of the variable. In makefile we want to define a series of variables, which are usually strings, and this is a bit of a macro in your C language, where the variables are extended to the appropriate reference location when the makefile is executed.

4, the document instructions. It includes three parts, one is referencing another makefile in one makefile, as in the C language, and the other refers to a valid part of the makefile specified in some circumstances, just as the precompiled #if in C language And there is the command to define a multiline. I'll tell you about this part in a later section.

5, notes. The only line comment in Makefile is the same as the Unix shell script, which is annotated with the "#" character, which is like "//" in C + +. If you want to use the "#" character in your makefile, you can escape it with a backslash, such as "/#".

Finally, it is worth mentioning that the commands in makefile must start with the [Tab] key.


Second, the name of the makefile

By default, the make command searches the current directory for files named "Gnumakefile," "Makefile," and "Makefile," and finds an explanation for the file. In these three filenames, it is best to use the filename "Makefile" because the first character of the file name is uppercase, so there is an obvious sense of purpose. It is best not to use "Gnumakefile", which is the GNU make recognition. There are other make only sensitive to all lowercase "makefile" file names, but basically, most do support both the "makefile" and "makefile" default filenames.

Of course, you can use other file names to write makefile, such as: "Make.linux", "Make.solaris", "Make.aix", and so on, if you want to specify a specific makefile, you can use make's "-F" and "--file" parameters , such as: Make-f make.linux or make--file Make.aix.


Third, refer to other makefile

Using the Include keyword in makefile can include other makefile, much like the #include of the C language, where the included files are placed in the original mode as they are in the current file. The syntax for include is:

Include <filename>

FileName can be the file mode of the current operating system shell (can contain paths and wildcard characters)

You can have some empty characters in front of the include, but you must never start with a [Tab] key. Include and <filename> can be separated by one or more spaces. For example, you have a few makefile:a.mk, B.mk, C.mk, and a file called Foo.make, and a variable $ (bar) that contains e.mk and F.MK, then the following statement:

Include Foo.make *.mk $ (bar)

Equivalent to:

Include Foo.make a.mk b.mk c.mk e.mk f.mk

The make command starts with the search for the other makefile that are indicated by the include and places its contents in the current location. It's like the #include instruction of C + +. If the file does not specify an absolute or relative path, make will first look in the current directory, and if it is not found in the current directory, make will also look in the following directories:

1. If make executes with "-I" or "--include-dir" parameters, make will look for it in the directory specified by this parameter.
2, if the directory <prefix>/include (generally:/usr/local/bin or/usr/include) exists, make will also go to find.

If a file is not found, make generates a warning message, but no immediate fatal error occurs. It will continue to load other files, and once the makefile is completed, make will retry the files that are not found, or cannot be read, and if not, make will appear with a fatal message. If you want make to ignore files that cannot be read, you can add a minus sign "-" before the include. Such as:

-include <filename>
This means that no matter what errors are found in the include process, do not continue with the error. The related command for the other version make compatibility is Sinclude, and the effect is the same as this one.


IV. environment variable Makefiles

If you have defined an environment variable makefiles in your current environment, make makes a value similar to include in the variable. The value in this variable is the other makefile, separated by a space. It's just that, unlike include, the makefile "target" introduced from this environment change does not work, and if the file defined in the environment variable finds an error, make will ignore it.

But here I recommend not to use this environment variable, because as long as the variable is defined, then when you use make, all the makefile will be affected by it, which is not what you want to see. To mention this here, just to tell you that there may be times when your makefile is strange, then you can see if there is a variable defined in the current environment.


V. the way make works

GNU's make work steps down: (Want other make is similar)

1, read all the makefile.
2. Read the other makefile included.
3, initialize the variable in the file.
4, deduce obscure rules, and analyze all the rules.
5. Create a chain of dependency relationships for all target files.
6. Depending on the dependencies, decide which goals to regenerate.
7. Execute build command.

1-5 steps for the first stage, 6-7 for the second stage. In the first phase, if the defined variable is used, make will expand it in the position used. But make does not start all at once, make uses delaying tactics, and if the variable appears in the rules of the dependency, then the variable will only expand inside it if it is decided to use it.

Of course, you don't have to be clear about the way you work, but knowing this way you'll be more familiar with make. With this foundation, the follow-up part is easy to understand.

Origin: http://blog.csdn.net/haoel/article/details/2888

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