Analysis of Linux 2.6 kernel makefile __linux

1 Overview

The Makefile consists of five parts: Makefile: The root Makefile, which reads the. config file and is responsible for creating vmlinux (kernel mirroring) and modules (module files). config: Kernel configuration file (typically made Menuconfig generation). arch/$ (ARCH)/makefile: Makefile of the target processor. scripts/makefile.*: All Kbuild Makefile rules, which contain definitions/rules, and so on. Kbuild makefiles: Each subdirectory has kbuild Makefile, which is responsible for generating built-in or modular targets. (Note: The Kbuild Makefile refers to the Makefile that uses the kbuild structure, and most Makefile in the kernel are kbuild Makefile.) ) 2 kbuild files 2.1 obj-y and Obj-m

The simplest kbuild makefile can contain only:

obj-$ (Config_foo) + + FOO.O

where $ (config_foo) can be equal to Y or M, its value is given by the. CONFIG file. If $ (config_foo) is neither Y nor m, then the file will not be compiled and linked

When $ (config_foo) equals Y, the above statement is equivalent to obj-y + = FOO.O, which tells Kbuild that in the current directory there is a target file called FOO.O, which is compiled from FOO.C or FOO.S.

When $ (config_foo) equals m, it means that the foo.o need to be compiled into a module. 2.1.1 obj-y generation BUILT-IN.O

Kbuild compiles all the $ (obj-y) files and calls "$ (LD)-R" to merge all these files into the built-in.o file. This BUILT-IN.O will be used by the makefile of the upper level directory and eventually linked to the Vmlinux. 2.1.2 targets are compiled from multiple source files

If a target is compiled from multiple source files, you can tell kbuild the source files by $ (<MODULE_NAME>-OBJS) or $ (<module_name>-y). Kbuild can recognize suffixes-objs and-y, for example:

#drivers/isdn/i4l/makefile obj-$ (CONFIG_ISDN) + + ISDN.O ISDN-OBJS: = ISDN_NET_LIB.O isdn_v110.o ISDN_COMMON.O

Kbuild compiles objects in all $ (ISDN-OBJS) and calls "$ (LD)-R" to link them into ISDN.O files.

Here is an example of using suffix-y. The advantage of suffix-y is that you can use the CONFIG_XXX symbol to decide whether to add some source files (. o compiled from the corresponding. C or. s):

#fs/ext2/makefile obj-$ (CONFIG_EXT2_FS) + + EXT2.O Ext2-y: = BALLOC.O BITMAP.O ext2-$ (config_ext2_fs_xattr) + + XATTR.O

2.1.3 called subdirectory makefile

Makefile is only responsible for compiling objects in the current directory. The object in the subdirectory, which is responsible for the makefile in the child directory. How to let make call the makefile in the subdirectory. The answer is that the handle directory is included in Obj-y or obj-m. For example:

#fs/makefile obj-$ (CONFIG_EXT2_FS) + + ext2/

When Config_ext2_fs is Y or M, the Kbuild system invokes the make command in the Ext2 directory (also called Makefile in the ext2 directory) 2.2 lib-y and lib-m

In one directory, the files listed in Obj-y are compiled into BUILT-IN.O files, and lib-y or lib-m files that are listed in the current directory will be generated LIB.A files.

Note: The general lib-y or lib-m are used only in the lib/and Arch/*/lib directories. 2.3 Compiling option variables 2.3.1 Ccflags-y, asflags-y, Ldflags-y

These three variables are valid only in the current makefile. Add: $ (kbuild_cflags) is a variable defined in the root makefile, which applies to the entire number of cores. 2.3.2 Subdir-ccflags-y, subdir-asflags-y

These two variables act on the current makefile and all of its subdirectories. 2.3.2 cflags_$@, aflags_$@

These two variables are valid only in the current makefile. $@ can be used to specify file names so that different files can use different compilation options. For example:

# Drivers/scsi/makefile CFLAGS_AHA152X.O =-daha152x_stat-dautoconf CFLAGS_GDTH.O = #-ddebug_gdth=2-d__serial__-d__com2__/ -dgdth_statistics CFLAGS_SEAGATE.O =-darbitrate-dparity-dseagate_use_asm

2.4 $ (SRC), $ (obj), $ (Kecho)

$ (SRC) refers to the relative path of the directory where the current makefie resides. $ (obj) points to the relative directory used to hold the target file. Examples are as follows:

#drivers/scsi/makefile $ (obj)/53c8xx_d.h: $ (SRC)/53c7,8xx.scr $ (src)/script_asm.pl $ (CPP)-dchip=810-< $< | ... $ (src)/script_asm.pl

Here, $ (src) equals drivers/scsi/,$ (obj) is also equal to drivers/scsi/.

When you use the "make-s" command, only warnings and error messages are printed. $ (Kecho) is able to output subsequent content to the standard output stream (usually the display), provided that "make-s" is not used. Examples are as follows:

#arch/blackfin/boot/makefile $ (obj)/vmimage: $ (obj)/vmlinux.gz $ (call if_changed,uimage) @$ (Kecho) ' Kernel: $@ is ready '

2.5 $ (CC) related features 2.5.1 as-option, ld-option, Cc-option

When compiling and linking files, Xx-opiton can be used to check whether the currently used $ (CC) supports the given compilation options. If the former is not supported, the latter can be used. For example:

#arch/sh/makefile Cflags-y + = $ (call as-option,-wa$ (comma)-isa=$ (isa-y),)

If the current $ (CC) does not support-wa$ (comma)-isa=$ (isa-y), you can use the second compilation option (empty here). 2.5.2 Cc-option-yn

Cc-option-yn is used to check whether the $ (CC) supports the given compilation options. If supported, returns Y, otherwise returns N. For example:

#arch/ppc/makefile Biarch: = $ (call Cc-option-yn,-m32) aflags-$ (Biarch) + +-a32 cflags-$ (Biarch) + +-m32

2.5.3 cc-option-align

GCC changed the type of the specified function, loop, and so on after 3.0. GCC < 3.00 when cc-option-align =-MALIGN;GCC >= 3.00, cc-option-align =-falign. Use $ (cc-option-align) to select the correct prefix. For example:

Kbuild_cflags + = $ (cc-option-align)-functions=4

2.5.4 cc-version, cc-ifversion, Cc-fullversion

Cc-version returns the $ (CC) version. If $ (CC) is GCC 3.41, then Cc-version returns 0341. For example:

#arch/i386/makefile Cflags-y + = $ (Shell/ If [$ (call cc-version)-ge 0300]; Then/ echo "-mregparm=3"; Fi;)

Cc-ifversion returns the last parameter if the version meets the criteria. Examples are as follows:

#fs/reiserfs/makefile Ccflags-y: = $ (call cc-ifversion,-lt, 0402,-o1)

If the $ (CC) version is below 4.2, then ccflags-y equals-o1.

Cc-fullversion gives a more detailed version of the information, such as:

#arch/powerpc/makefile $ (Q) if test "$ (call cc-fullversion)" = "040200"; Then/ Echo-n ' * * * GCC-4.2.0 cannot compile 64-bit PowerPC '; / false; / Fi

2.5.5 Cc-cross-prefix

Cc-cross-prefix is used to check for the existence of $ (CC) for a given prefix, or, if present, to return the first matching prefix, or null to return. If multiple prefixes need to be matched, each prefix is separated by a single space. For example:

#arch/m68k/makefile Ifneq ($ (Subarch), $ (ARCH)) Ifeq ($ (cross_compile),) Cross_compile: = $ (call Cc-cross-prefix, m68k-linux-gnu-) endif endif

(Note: The content described in this article comes from kernel-2.6.30/documentation/kbuild/makefiles.txt, applicable to the Linux 2.6 kernel)

starting with Linux kernel 2.6, the Linux kernel is compiled using the Kbuild system, which It is very different from the previous compilation system, especially for the Linux kernel module compilation. Under the new System, Linux compilation system will scan Linux two times Makefile: first compile the system will read the Linux kernel top of the Makefile, and then read the content of the second read Kbuild Makefile to compile the Linux kernel.