Android Combat 36: Makefile Quick Start

Goal

Through the introduction of an article to be able to write simple makefile and can read common makefile purposes.

About make

Make is an established build tool that has been around for more than 45 years since its inception in 1970, and is incredibly attractive today as technology advances. Make plays a huge role in large-scale software projects. I first touched it when I was learning Linux kernel, and the Android system was built with scripts such as make and Python, so mastering make knowledge is your first hurdle to these systems. You have to give make enough attention, do not think that the master C + +, Java, the main programming language can control the world, when you are lost in the vast number of makefile and all kinds of *.py,*.sh, not building the knowledge of the system is maddening.

The advantage of make is that you can tell the relationship between the elements in the program and then make will determine which steps should be recompiled to produce the program you need, based on these relationships and timestamps. This is what we often call incremental compilation.

One of the simplest makefile

Usually make is performed according to Makefile/makefile, and Makefile contains a set of rules to compile the program. A rule can be divided into three parts: the target, the necessary condition (prereq), and the command to execute.

targetprereq1 prereq2    commands

C file has only one MAIN.C

#include <stdio.h>int main(intchar** argv) {        printf("hello, makefile!\n");}

The first of the makefile

#first makefilehello-makefile: main.c       -o hello-makefile main.c

Read the following:
This makefile is made up of a task (rule), the target is an executable file called Hello-makefile, the necessary condition is the Main.c file, and the command is a gcc compiler command.
The results of the implementation are as follows:

-o hello-makefile main.c

A second makefile

#final targethello-makefile: main.o        gcc -o hello-makefile main.o#main.omain.o: main.c        gcc -c main.c

Read the following:
The above step is decomposed into two steps, in order to generate hello-makefile need to rely on a condition is MAIN.O, and then MAIN.O as the target and then write a rule. Usually a makefile is a combination of so many different rules.
The results of the implementation are as follows:

-c main.-o hello-makefile main.o

Makefile Basic syntax

Structure from top to bottom

As makefile above, the default starts with the top-level work target (usually called all) and puts some work targets such as clean work at the very bottom of the file.
Special Symbols
The pound sign (#) is used to denote comments
backslash (\) as line continuation character
wildcard characters
Consistent with common shell wildcard characters.
An asterisk (*) represents any number of characters, and a question mark (?) represents an arbitrary character.
. Phony
You can avoid name collisions by imagining your work goals. appear in the following situations:

.PHONY: cleanclean:        rm -f *.o

Commonly used. Phony as follows:

all        执行编译应用程序的所有工作install    从已编译的二进制文件进行程序的安装clean      清楚生成的二进制文件distclean  清楚所有生成的文件TAGS       建立可供编辑器使用的标记表check      执行与程序相关的任何测试

Variable

$(variable)${}

The variable name is a single character without parentheses.

VPATH
Tell make to go to the specified directory if it is not found in the current directory. Like what:

VPATH = src include

C + + labeling
Sometimes you need to enter some parameters to tell GCC to do something, such as adding the-I option to inform the startup of the implicit compilation rule:

CPPFLAGS = -I include

include keyword
Sometimes you need to call other makefile, just use the include to join it:

include /home/linc/workspace/lab/OpenCV-android-sdk-2.4.11/sdk/native/jni/OpenCV.mk

Next

Read the GNU make project management, where more in-depth knowledge and experience can be found in the book.

Android Combat 36: Makefile Quick Start