Hexagon's software stack

Overview

The hexagon processor includes a dedicated register and instructions to implement the call stack for the subroutine execution.

The structure of the stack follows the traditional C standard.

structure of the stack

The following figure shows the stack structure in the hexagon processor

The address of the stack is defined as extending from a high address to a low address. The pointer sp of the stack points to the top data element in the current stack.

Note: The hexagon processor supports three stacks of instructions: Allocframe,deallocframe and Dealloc_return

The address of the SP register must be 8-bit aligned, primarily for stack instructions to run properly

stack frames provided by the hexagon

The stack is used to hold the stack frame, which is a data structure that holds the state information of the active subroutine in the program (the active subroutine refers to those programs that are called but not returned). Each stack frame corresponds to a subroutine in the program.

The stack frame contains the following elements

Local variables and the address (pressed into the frame pointer register FP) for the previous stack frame on the stack of data subroutine calls used by the quilt program (pushed in from the connection register LR)

The frame pointer register FP always has a stack frame on the stack. This design allows the debugger to check the memory stack to realize the error-checking function of the program, and easily define the calling instruction, function parameters and so on.

Stack Register

The following figure is a stack register graph in the hexagon processor

Note: The stack register is an alias for three general-purpose registers. These general purpose registers are designed for use with stack registers.

Stack Instructions

The following figure is the specific meaning and operation of the three instructions given by Qualcomm:

Note: Allocframe and Deallocframe will import and save the LR and FR registers to be saved in a single aligned 64-bit register.