JLink V8 debugging exynos 4412 u-boot, jlinkexynos

JLink V8 debugging exynos 4412 u-boot, jlinkexynos
/*************************************** **************************************** ** @ Author Maoxiao Hu * @ version V1.0.0 * @ date Dec-2014 ************************** **************************************** * *********** <COPYRIGHT 2014 ISE of shandong university> ******************* **************************************** **********************/
Access the blog "Debug exynos 4412 u-boot with eclipse and jLink V8", hereinafter referred to as "blog 1". Statement in advance: after self-testing and modification, you can use JLink to debug uboot. In blog 1, the debugging environment was initially set up, but after experiment, there were many problems: 1. The Code/data in eMMC was not considered completely damaged, cannot be started. 2. If you only use the BL1 burn provided by Samsung to write to the TF card for startup, JLink cannot detect the CPU. 3. eclipse automatically matches assembly/source code errors, resulting in unrecognized reading. The cause or solution is as follows: 1. Data/source code in eMMC is completely damaged and needs to be started from TF/SD card, for details about how to create an Exynos 4412 u-boot disk, refer to my blog [tips] how to use a TF/SD card on a Mac. 2. The reason why the CPU cannot be detected may be that the power management chip did not provide power to the IP core of 4412 CoreSight, And the JTAG port Vref pin had no reference voltage output, JLink cannot detect this reference voltage and cannot determine the CPU level range. 3. Only the samsung sub-folder is retained under the board folder, and only the arm_cortexa9 sub-folder is retained under the cpu folder, and other architecture folders can be deleted. I. Create the minimum boot disk that can be connected to the Jlink debugger. To solve the second problem above, we need to burn BL1 while creating the boot disk of the TF card, you also need to write another BL2 that enables the power management chip (PMC), but this BL2 only enables PMC without any other code. Modify the starting part of start. s: Compile uboot and write the checksum_bl2_14k.bin generated in the BL1 and CodeSign4SecureBoot folders. Note that the production of a TF card that can be connected to JLink for debugging is complete, and the boot disk does not need to be moved during the u-boot debugging phase! 2. Temporarily modify the code base address to modify the board/samsung/smdkc210/config. mk

TEXT_BASE = 0x02023400

 

Cancel the check_mem definition in lowlevel_init.S.

See Figure 3-1 in "Export exynos4412_irom_secure_booting_guide_ver.1.00.00133" for reference.

3. Remove the MMU enabling Function

Mmu_on

4. Replace the following gdb initialization commands in eclipse

Target remote localhost: 2331
Monitor sleep 10
Monitor halt
Monitor sleep 500
Load
Break _ start

Supplement: if the source code in eclipse is still incorrectly displayed after adjustment, you don't need to worry about it. You can directly view the assembly area below eclipse. the source code of the assembly area must be correctly displayed.

After completing the above points, the uboot debugging can be done perfectly, and the remaining problems are basically code problems.

There is still a problem: when the clock initialization code is debugged to uboot, JLink will lose connection. It is estimated that the clock adjustment directly affects the CoreSight module, and JLink is forced to be disconnected from the CPU. Therefore, the clock Initialization is in the uboot debugging phase and needs to be directly put into the gdb initialization command. After debugging is completed in other parts, the uboot code will be transferred. The above script will be released in a later blog (for details, see JLink V8 initialize exynos4412 script). Appendix: 1. Samsung BL1.bin download password: 7jpr2. Prepared checksum_bl2_14k.bin download password: av3y