My understanding of virtual memory

Source: Internet
Author: User

My understanding of virtual memory
What is virtual memory?

You can directly extract an introduction from wikipedia.

Virtual Memory is a technology for memory management in computer systems. It makes the application think that it has continuous available memory (a continuous and complete address space). In fact, it is usually divided into multiple physical memory fragments, some of them are temporarily stored in external disk storage for data exchange as needed.

For variables in the C language, we can use the & operator to obtain their addresses. Since they are virtual addresses, they are virtual addresses.

The virtual address mechanism is not necessary. In a simple single-chip microcomputer, you must specify the physical RAM Space Distribution During code compilation. There is no virtual address concept, an address is a physical address in RAM.

Why Virtual Memory?

The following are my understandings, which may be inappropriate.

If you run a program on bare metal, you cannot execute other programs at the same time. You need to introduce the operating system for management. With the operating system, we may be able to run multiple different programs, but it is likely that we cannot execute multiple instances of the same program at the same time, because the physical address used by the same program is the same (assuming the old compiler), conflicts may occur when running together. There are two solutions to run multiple instances of the same program.

  1. Re-compile a program that uses other addresses, which does not conflict with the previous one.
  2. When running this program, you can add an address offset to ensure that the addresses are different.

The first one is to let the compiler complete it. Theoretically, it can be done, but it will be too troublesome. If I want to run three or four at the same time, I have to compile it several times.
The second is to let the operating system complete it. It should be a prototype of virtual memory. After this mode is used, the address in the program provided by the compiler is not the actual physical address. It is a virtual address.

X86 virtual memory technology GDT/LDT

Both GDT and LDT introduce the x86 system at 80286. LDT and GDT share a similar structure. LDT is used to serve multiple processes with independent address spaces. Generally, each process has an LDT, while the shared memory and kernel memory use GDT. Each program determines the base address based on the segment descriptor, and each Entry contains the limit field, which can be used to limit the access space of the program. However, after introducing better paging technology in 80386, LDT is basically no longer used.

Paging

As the implementation of the current virtual memory technology, paging is certainly better than LDT, but their implementation ideas are similar. The operating system maintains a handle for each process. This handle is associated with the data block that the process converts from virtual addresses to physical addresses. In LDT, handle is the LDT pointer and length, and the data block is the LDT itself. In paging mode, the data block is called paging structure, and handler is the pointer to it.

Paging structureThere are 4096 bytes, including independent entries. In different modes, the size of each entry is different. Each entry contains a physical address, which can point to a page frame or another paging structur, that is, cascade mode. The pointer pointing to the first page structure is located in the CR 3 register, and then the process from linear address to physical address is an iteration process. A linear address is used to indicate the corresponding entry. If the entry points to another page structure, it continues until it points to a page frame, indicating that the address conversion is complete, use the last entry as the base address, and the rest of the linear Address indicates the offset.

Now we will talk about pagination in 32bit mode. Each entry is 4 bytes in 32 bits, and each paging structure contains 1024 entries, which requires 10 bits to distinguish each entry. In 32bit mode, two levels of pageing structure are used. The first level is calledPage DirectoryThe second level is calledPage TableUse the bits 21-12 of the 32bit linear address to differentiate, and the remaining bits 11-0 is used to calculate the offset in the 4 K page.

All linear addresses are stored in physical address translation. The storage of such linear addresses is the base address of the next step, and the storage of linear addresses is the offset.

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