The stack of CORTEX-M3 and the Orange software

Source: Internet
Author: User

CORTEX-M3 has universal register R0-R15 and some special function registers. R0-r12 is the most "common purpose", the vast majority of 16-bit instructions can only use R0-R7, while the 32-bit Thumb-2 instruction has access to all the universal registers. Special function registers must be accessed through a dedicated instruction.
Universal Purpose Register R0-R7
R0-R7 is called a low group register. All instructions are accessible, R8-r12 called High group registers, and only a few 16-bit thumb instructions can access them, and 32-bit Thumb-2 instructions are unrestricted.

The access stack uses the stack pointer, and the push and pop directives use the SP by default.
Push and pop of stack
A stack is a usage model of a memory. It consists of a contiguous memory and a stack-top pointer for implementing a "LIFO" buffer. The most typical application is to save the value of the register before processing the data, and then restore the previously protected values after the processing task completes.
Note: The push and pop operations of registers are always 4-byte aligned. The reason: the minimum two bits of the stack pointer are always 0.

Stack memory operation
In Cortex-m3, in addition to using push and pop instructions to process stacks, the kernel also automatically push and pop operations as the exception is handled.
Basic operation of the stack
The function of the stack is to temporarily back up the register data in memory so that it can be recovered in the future-after the execution of a task or a subroutine is completed.

..... (main program)
; R0, R1=y, r2=z
BL   Fx1
                    PUSH {R0}   ; deposit R0 into Stack & Adjust SP
                    PUSH {R1}   ; save R1 to Stack & Adjust SP
                    Push {R2}   ; deposit R2 into Stack & Adjust SP
                    ...       ; Perform Fx1 function, midway can change r0-r2 value
                    POP  {R2}   ; restore R2 Previous value & Adjust SP
                    POP  {R1} again   ; restore R1 Previous value & Adjust SP
                    POP  {R0} again   , restore R0 Previous value & Adjust SP BX LR again; return
; return to main program
; R0=x,r1=y.r2=z (the value of the R0-R2 before and after the call Fx1 is intact)

Push/pop instructions are considerate enough to support multiple registers at a time.

Stack implementation of CORTEX-M3
CORTEX-M3 uses the "full stack of downward growth" model. The stack pointer sp points to a 32-bit value that is pressed onto the stack. In the next pressure stack, the SP first from 4, in the new value. The following figure:

Looking at the double stack mechanism of CORTEX-M3
we already know that the stack is divided into two: the master stack and the process stack, control[1] decide how to choose.
when control[1]=0, only MSP is used, at which point the user program and exception handler share the same stack.

when control=[1]=1, thread mode will no longer use MSP and use the PSP instead (handler mode always uses MSP). The advantage of

is that, in an environment that uses the OS, the user application executes only in user mode, as long as the OS kernel executes only in handler mode, which prevents the user program's stack error from damaging the stack used by the OS.
by reading the value of the PSP, the OS is able to get the stack used by the user's application, further knowing what is being pressed into the register when an exception occurs, and can also push other registers further down the stack.

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