Tiny4412 Linux Kernel boot process

The boot of the Linux kernel is divided into two types: compression kernel and non-compressed kernel, here we take the compression kernel as an example. When the compression kernel runs, it runs a decompression program, gets a true kernel image, and jumps to the kernel image to run. At this point, Linux enters the non-compressed kernel entry, in the non-compressed kernel portal, the completion of various initialization operations to jump to the C language entrance to run. The main process is shown below.

1. Unzip the kernel image

The decompression program is typically in the arch/arm/boot/compressed/directory

├──atags_to_fdt.c├──big-endian. s├──decompress.c├──Head. s├──Head-sa1100. s├──Head-Shark. s├──Head-SHARPSL. s├──Head-Shmobile. s├──Head-vt8500. s├──Head-XScale. S├──libfdt_env.h├──ll_char_wr. S├──makefile├──misc.c├──mmcif-SH7372.C├──OFW-Shark.c├──piggy.gzip. S├──piggy.lzma.s├──piggy.lzo.s├──piggy.xzkern.s├──sdhi-Sh7372.c├──sdhi-Shmobile.c├──sdhi-shmobile.h├──string. C└──vmlinux.lds.inch

After they have been compiled, the generated content is independent of the real Linux kernel, which is the function of initializing the environment, extracting and running the real Linux kernel. When the compression kernel starts, first enter the head in the compressed directory in the arch/arm/boot/compressed directory. S file.

Start:. Type start, #function. rept7                movr0, R0 endr ARM (movR0, R0)             ARM (b 1f) thumb (ADR R12, Bsym (1f)) Thumb (BX R12                   ). Word 0x016f2818 @ Magic numbers to help the loader. Word Start @ absolute Load/run zimage address. Word _edata @ zimage End Address THUMB (. Thumb)1:movR7, r1 @ Save Architecture IDmovR8, R2 @ Save atags pointer

Start is head. The beginning of the program of S, before which are some macro definitions. Save the parameters passed by bootloader at the 1 marking point.

#ifndef __arm_arch_2__/* * Booting from angel-need toEnterSVC mode andDisable * FIQS/IRQS (numeric definitions from Angel Arm.h source). * We only does this if We wereinchuser mode on entry.                */@ Get current operating mode Mrs R2, CPSR @ Get present mode @ test for USR mode TST R2, #3@ notuser? BNE Not_angelmovr0, #0x17 @ angel_swireason_entersvc ARM (Swi 0x123456) @ angel_swi_arm THUMB (svc 0xab) @ angel_swi_thumbNot_angel:Mrs R2, CPSR @ turn off interrupts to Orr R2, R2, #0xc0 @ Prevent Angel from running MSR cpsr_c, R2#else teqp pc, #0x0c000003 @ tur N Off Interrupts#endif

If the kernel runs from Angel into a mode of USR mode, it will need to enter the SVC mode and disable all Fiq and IRQ interrupts. These are only performed when the user mode is entered. Normally, the code that closes the interrupt is run at the Not_angel label. Then redirect the kernel Code (telocate)--(this part of the code is not yet read-_-!!! ), the redirect is completed and then jumps to the not_relocated label to run.

not_relocated:  movR0, #0     1:StrR0, [R2], #4@ Clear BSSStrR0, [R2], #4                StrR0, [R2], #4                StrR0, [R2], #4                CMPR2, R3 blo 1b/* * The C Runtime environment should now is setup sufficiently. * Set up some P Ointers, andstart decompressing. * R4 = Kernel execution address * R7 = Architecture ID * R8 = atags pointer * * movr0, R4movR1, SP @ malloc space above stackAddR2, SP, #0x10000 @64kMaxmovR3, R7 bl decompress_kernel bl cache_clean_flush bl Cache_offmovR0, #0@ must be zeromovR1, R7 @ Restore Architecture numbermovR2, R8 @ Restore atags pointer ARM (movPC, R4) @PagerKernel

After the redirect is complete, first clear the BSS section, then all the initialization of the C language running environment to do, and then call Decompress_kernel decompression kernel, then jump to the non-compressed kernel boot phase.

2. Assembly phase start-up process

For tiny4412, the kernel's link script is Arch/arm/kernel/vmlinux.lds, which is generated by ARCH/ARM/KERNEL/VMLINUX.LDS.S. In the link script, we can find the portal of the kernel

Output_arch (ARM) ENTRY (stext) jiffies = jiffies_64 ; sections{

You can see that the kernel entrance is stext, which is linux/arch/arm/kernel/head. is defined in S.

. Arm __headentry (stext) THUMB (ADR R9, Bsym (1f)) @ Kernel is always enteredinchARM. THUMB (bx R9) @ If This is a thumb-2kernel, thumb (. thumb) @ Switch to THUMB now. THUMB (1:) @ set to SVC mode, turn off IRQ, FIQ setmode psr_f_bit | Psr_i_bit | Svc_mode, R9 @ ensure svc MODE @ andIRQs disabled @ Check if CPU ID matches MRC P15,0, R9, C0, C0 @ Get processor ID BL __lookup_processor_type @ r5=procinfo r9=CPUIDmovs R10, R5 @ Invalid processor (r5=0)? THUMB (IT eq) @ Force fixup-able Long Branch encoding beq __error_p @ Yes, error'P'#ifdef config_arm_lpae MRC P15,0, R3, C0, C1,4@ Read Id_mmfr0 andR3, R3, #0xf @ Extract Vmsa supportCMPR3, #5@ long-descriptor translation table format? THUMB (it lo) @ Force fixup-able Long Branch encoding blo __error_p @ only Classic Pag E table Format#endif#ifndef config_xip_kernel ADR R3, 2f Ldmia R3, {r4, r8}SubR4, R3, R4 @ (Phys_offset-page_offset)AddR8, R8, R4 @ phys_offset#else Ldr R8, =phys_offset @ Always constantinchThis case#endif/* * R1 = machine no, r2 = atagsorDTB, * r8 = phys_offset, R9 =CPUID, R10 = procinfo */@ Check bootloader incoming parameter list atags legality bl __vet_atags#ifdef config_smp_on_up bl __fixup_     Smp#endif#ifdef config_arm_patch_phys_virt BL __fixup_pv_table#endif @ Create initial page table BL __create_page_tables/* * The following calls CPU specific codeincha position independent * manner. See arch/arm/mm/proc-*.  S for details.  R10 = base of * Xxx_proc_info structure selected by __lookup_processor_type * above. On return, the CPU would be a ready-for-the-MMU-be *-turned on, andR0 would hold the CPU control register value.  */@ Establish C locale (code relocation, clear BSS section) Ldr R13, =__mmap_switched @ address to jump to after @ MMU has been enabled ADR LR, Bsym (1f) @ return (PIC) addressmovR8, R4 @ set TTBR1 to Swapper_pg_dir ARM (Addpc, R10, #PROCINFO_INITFUNC) THUMB (AddR12, R10, #PROCINFO_INITFUNC) THUMB (movpc, R12) @ Open MMU1: B __enable_mmuendproc (stext)

__mmap_switched defined in Arch/arm/kernel/head-common. S medium

__mmap_switched:ADR R3, __mmap_switched_data Ldmia r3!, {r4, R5, R6, R7}CMPR4, R5 @ Copy data segment if needed1: Cmpne R5, R6 Ldrne FP, [R4], #4Strne FP, [R5], #4BNE 1bmovFP, #0@ Clear BSS ( andZero FP)1:CMPR6, R7 STRCC FP, [r6],#4bcc 1b ARM (Ldmia R3, {r4, R5, R6, R7, SP}) thumb (Ldmia R3, {r4, R5, R6, R7}) thumb (Ldr s P, [R3, # -]           )        StrR9, [R4] @ Save processor IDStrR1, [R5] @ Save Machine typeStrR2, [R6] @ Save atags pointer bic R4, r0, #CR_A @ Clear'A'bit Stmia R7, {r0, R4} @ Save Control register values B start_kernel

The assembly phase code mainly accomplishes the following work ① setting the processor to SVC mode and shutting down interrupt ② call __lookup_processor_type Find processor information structure Proc_info③ call __enable_mmu open Mmu④ call __create_ Page_tables Create the initial page table ⑤ call __mmap_switched Initialize the C language runtime environment, the most red jump to the C-language stage of the entry function Start_kernel3. C-language phase START process

Kernel START process, knowledge reserve is not perfect, later update-_-... Reference article: http://blog.csdn.net/zqixiao_09/article/details/50821995

Tiny4412 Linux Kernel boot process