Hardware simulation implementation-Design and Implementation of SkyEye

Article Title: hardware simulation implementation-Design and Implementation of SkyEye. Linux is a technology channel of the IT lab in China. Includes basic categories such as desktop applications, Linux system management, kernel research, embedded systems, and open source.
　　 I. Overall structure of SkyEye
SkyEye is based on GDB/armulator (currently maintained by David McCullough) and has been fully changed and expanded. SkyEye is built on the bottom layer of gnu gdb and can imitate a variety of complete embedded computer systems, currently, analog hardware includes CPU, memory, I/O registers, clock, UART, network chip, MMU, and CACHE. In the future, it will simulate various hardware such as LCD and USB. Operating systems and various system software running on SkyEye are "unaware" that they are running on a virtual computer system.
　　
SkyEye is divided into four layers:
　　
User Interface Module: includes the command line user interface and graphical user interface. It processes user input commands and Outputs Relevant debugging data to the user. This part basically uses the user interface module of GDB and has been expanded to some extent.
Symbol processing module: mainly processes the header information of the execution file, explains the embedded debugging information of debuger in the execution file, manages the symbol table, and parses the source code expression, locate the relationship between the statement position and the machine code in the source code. This part also directly utilizes the GDB symbol processing module, which supports source code-level debugging.
Target control module: mainly implements execution control (such as interrupt program execution, and sets interrupt conditions), program stack structure analysis, control specific target hardware (such as local debugging, remote debugging, and analog debugging ). This part controls the software running on SkyEye and provides multiple debugging methods.
Target simulation module: This part is the core of SkyEye. Its function is to simulate the execution of the main hardware (including CPU, memory, and various hardware peripherals) in the computer system, and to explain the machine commands of the execution file, simulate and execute each machine command to generate the corresponding hardware response.
　　
　　 Ii. Functions of the SkyEye target simulation module
　　
The hardware logical structure simulated by the SkyEye target simulation module is shown in Figure 0 1. The SkyEye target simulation module has the following functions:
　　
Configuration option parsing and initialization module: control the configuration and initialization of the simulation hardware based on the configuration file options before the simulation hardware starts to run. Related Files include:
Arminit. c: Controls initialization of various analog hardware
Skyeye_config. [ch]: Option line for parsing the configuration file
Skyeye_options.c: complete various configurations based on various hardware options.
　　
Processor macro simulation module: Mainly used to simulate the processor architecture. It can be subdivided into: CPU Command Simulation execution module, MMU/CACHE simulation module, CoProcessor (also known as co-processor) simulation module.
CPU Command Simulation execution module: the main task is to complete command reading, Instruction Decoding, and instruction execution when the simulation hardware starts to run. If the CPU status changes, adjust the commands and various register values. Before executing the commands, call the io_do_cycle driver of the I/O simulation module of the Development Board to simulate the behavior of various peripherals. The main files include:
Armemu. [ch]: simulates three-level CPU pipelines and executes various commands.
MMU/CACHE simulation module: This module is divided into two parts: the MMU/CACHE simulation sub-module irrelevant to the Specific CPU type and the simulation sub-module related to the specific CPU type. The main task is to initialize according to the configuration file, simulate MMU/CACHE, and execute commands related to MMU/CACHE. If the CPU command simulation module executes the read/write memory operation command, it is transferred to the MMU/CACHE simulation module. If the simulated CPU type does not support MMU (such as arm7TDMI), SkyEye directly transfers the accessed address to the MEMORY simulation module or the I/O simulation module of the Development Board; otherwise, it is transferred to the simulation sub-module related to the specific CPU type for MMU/CACHE simulation. The main file consists of two parts:
MMU/CACHE simulation sub-modules unrelated to the Specific CPU type:
Armvirt. c, armmmu. c, mmu/*. [ch]
MMU/CACHE simulation sub-modules related to specific CPU types:
Sa_mmu. [ch]: Simulate the MMU/CACHE of strongarm
Arm7100_mmu. [ch]: Simulate the MMU/CACHE of arm7 [12] 0 T
Xscale_copro.c: Simulate xscale MMU/CACHE
Arm920t_mmu. [ch]: Simulate arm920t MMU/CACHE
CoProcessor (also known as coprocesser) simulation module: the main task is to complete the initialization of various coprocessors and execute commands of various coprocessors. In fact, part of the MMU/CACHE simulation module is to simulate the 15th coprocessor of arm. Its main function is to configure MMU/CACHE. The main files include:
Armcopro. c: Initialize the arm coprocessor Based on the configuration information.
Xscale_copro.c: simulation of xscale coprocessor cp13, cp14, cp15
Sa_mmu. [ch], arm7100_mmu. [ch]: simulation of strongarm, ep7312 coprocessor cp15
Arm920t_mmu. [ch]: simulation of arm920t coprocessor cp13, cp14, cp15
I/O macro simulation module: This module includes peripheral simulation with different logic behaviors, including the system I/O simulation module, network chip simulation module, and LCD simulation module.
System I/O simulation module: the main tasks of this module include: IO and peripheral initialization Based on the configuration file; simulate various external I/O devices (such as clock Counter accumulation, interrupt generation, LCD display, etc.); simulate the reading and writing of IO registers for specific CPUs and peripherals. This module is closely related to various development boards and CPUs. The main files include:
Armio. [ch]: abstraction layer module built on specific simulation submodules
Skyeye_mach_at91.c: Simulate Atmel AT91X40 Development Board
Skyeye_mach_ep7312.c: simulation of cirrus ep7312 Development Board
Skyeye_mach_pxa.c: Simulate intel xscale lubbock Development Board
Skyeye_mach_jx4510b.c: simulate a development board based on samsung cloud4510b
Skyeye_mach_cloud44b0.c: simulate a development board based on samsung cloud44b0
Skyeye_mach_sa.c: Simulate the adsbitsy Development Board Based on intel strongam
Skyeye_mach_lpc.c: simulate a development board based on philip lpc2249
Skyeye_mach_sharp.c: simulate a Development Board based on the sharp lw.a400
Skyeye_mach_at91rm92.c: Simulate the development board based on atmel at91rm9200
Skyeye_mach_cs89712.c: simulate a cs89712-Based Development Board
Network Chip simulation module: This module simulates the 8019AS network chip. The main tasks include: simulate the control logic of 8019AS, the interfaces of 8019AS and the IO simulation module of the specific development board, and the virtual network input and output interfaces. The main files include:
Skyeye-ne2k. [ch]: 8019AS hardware Logic Simulation
Skyeye_mach_at91.c: some content completes receiving Virtual Network Input Processing Simulation
Skyeye_net_tuntap.c: interface for configuring the tuntap Virtual Network
Skyeye_net_vnet.c: vnet Virtual Network Configuration Interface
Vnet. c, if_vnet.h: exclusive software package, vnet Virtual Network implementation
LCD/TouchScreen simulation module: This module simulates the LCD/TouchScreen control logic and is currently the only module that requires GUI support. Its main tasks are: configure LCD/TouchScreen hardware simulation and analog LCD/TouchScreen control logic. Files related to LCD/TouchScreen simulation include:
Skyeye_ LCD. [ch]: general control logic for LCD/TouchScreen configuration and LCD/TouchScreen Simulation
Skyeye_mach _ *. c: control logic and interrupt handling of LCD/TouchScreen RELATED TO THE DEVELOPMENT BOARD. Currently, skyeye simulation of ep7312 and pxa255 is supported.
MEMORY simulation module: This module has nothing to do with the specific CPU and Development Board. Its main tasks include initializing the MEMORY according to the configuration file and loading the binary image file; simulate RAM/ROM read/write. The main files include:
Armmem. [ch]: Mainly used to simulate RAM/ROM read/write.
　　
　　 Iii. Key Data Structure of SkyEye
There are many data structures in the SkyEye target simulation module. The main data structures defined by the hardware general organization are skyeye_config_t and armul_State. Understanding these two data structures is the key to understanding the hardware architecture of the entire skyeye simulation. further detailed analysis on these two data structures allows you to fully understand the hardware architecture details of skyeye.
　　
　　 1. skyeye_config Data Structure
The skyeye_config_t Structure describes the static configuration of the entire hardware simulated by SkyEye. Its content is as follows:
　　
Typedef struct {
Cpu_config_t * cpu;
Machine_config_t * mach;
Mem_config_t mem;
Net_config_t net [NET_MAXNICNUM_PER_HOST];
Uart_config_t uart;
Log_config_t log;
Armword start_address;
Armword no_ LCD;
Char config_file [MAX_FILE_NAME];
} Skyeye_config_t;
　　
The skyeye_config_t structure contains the CPU core configuration information-cpu, development board configuration information-mach, memory map configuration information-mem, network chip and network environment configuration information-net, host-oriented input and output configuration information-uart, test record output configuration information-log, simulate execution start address configuration information-start_address, whether there is a LCD-no_ LCD and record file name information-config_file. The CPU core configuration information, development board configuration information, memory map configuration information, network chip and network environment, and LCD configuration information are closely related to the simulation hardware.
　　
　　 2. cpu_config_t Data Structure
The structure of the CPU core is defined in the cpu_config_t data structure. The specific content is as follows:
Typedef struct {
Const char * cpu_arch_name;
Const char * cpu_name;
Armword cpu_val;
Armword cpu_mask;
Armword cachetype;
} Cpu_config_t;
　　
The description is as follows:
　　
Cpu_arch_name: the name of the arm cpu architecture. According to the development of the arm cpu kernel, the architecture has evolved from Version1 to Version5, and its latest version is Version5TE. Intel also developed its own extended architecture StrongARM (based on ARM version4) and XScale (based on ARM version5 ). Currently, SkyEye supports the architecture of "armv3", "armv4", "arm5", "arm5TE", and "xscale.
Cpu_name: describes the specific arm cpu name, such as arm7TDMI, ARM720T, StrongARM1100/1110, and XScale PXA2xx. Currently, SkyEye supports "arm710", "arm7TDMI", "arm720t", "sa1100", and "xscale.
Cpu_val: This is used to represent the process id. Generally, each specific arm cpu has an ID. For more details, see the B2-6 of arm Architecture Reference Manual. The operating system identifies the cpu type based on this ID and executes related configurations.
Cpu_mask: this is the number of blocked digits used to determine the process id. Because