Linux interrupt handling Initialization

Article Title: linux interrupt handling initialization. Linux is a technology channel of the IT lab in China. Includes basic categories such as desktop applications, Linux system management, kernel research, embedded systems, and open source.

I. Introduction

In Intel's documents, there are two types of interruptions: one is exception, also called synchronous disconnection, and the other is called interruption or exception interruption.

Synchronization is triggered by a CPU control unit. It is called synchronization because the interruption occurs only after a command is executed. for example, in Division operations, an exception occurs when the divisor is zero.

Asynchronous interruptions are randomly generated by external devices according to the CPU clock. For example, when a data entry is detected by the NIC, an interruption occurs.

Ii. x86 interrupt handling process

Because the interrupt is on, after a command is executed, the logical address of the next command is included in the registers of cs and eip. Before processing the command, the control unit checks whether an interruption or exception occurred while running the previous command. If an interruption or exception occurs, the Control Unit performs the following operations:

1. Determine the vector I associated with the interrupt or exception (0 ≤ I ≤ 255)

2. Read the I entry in the IDT table directed by the idtr register.

3. Obtain the base address of GDT from the gdtr register and search for it in GDT to read the segment descriptor identified by the selector in the IDT table. This descriptor specifies the base address of the segment where the interrupt or exception handling program is located.

4. Make sure that the interruption is initiated by the authorized (interrupted) source. First, compare the current privileged CPL (the lower two digits stored in the cs register) with the descriptor privileged DPL of the segment descriptor (stored in the GDT. If CPL is smaller than DPL, a "normal protection" exception occurs because the privilege level of the interrupt handler cannot be lower than that of the program that causes the interruption. For programming exceptions, perform a further security check: Compare CPL with the DPL In the IDT gate descriptor. If DPL is smaller than CPL, a "general protection" exception is generated.

One check can avoid special traps and interruptions for user applications.

5. Check whether the privilege level changes, that is, whether CPL is different from the DPL of the selected segment descriptor. If yes, the control unit must start to use the stack associated with the new privileged level. Do this by performing the following steps:

A. Read the tr register to access the TSS segment of the running process.

B. Load the ss and esp registers with the correct values of stack segments and stack pointers related to the new feature level. These values can be found in TSS.

C. Save ss and esp values in the new stack. These values define the Logical Address of the stack associated with the old privileged level.

6. If the fault has occurred, use the abnormal command address to load the cs and eip registers so that the command can be executed again.

7. Save eflag, cs, and eip content in the stack.

8. If an exception generates a hardware error code, save it in the stack.

9. Load the cs and eip registers. Their values are the segment selection and offset fields of the I-gate descriptor in the IDT table. These values provide the Logical Address of the first instruction of the interrupt or exception handling program.

The last step of the control unit is to jump to the interrupt or exception handling program. In other words, after the interrupt signal is processed, the Command executed by the control unit is the first command of the selected processing program.

The above process description is taken from < <深入理解linux内核> >, Which are worth noting:

1: After passing through the door, the operation level can only be increased. as described above, "the current privileged level CPL (the lower two digits stored in the cs register) is compared with the descriptor privileged level DPL of the segment descriptor (stored in the GDT. If CPL is smaller than DPL, a "normal protection" exception occurs. During interrupt handling, the corresponding segment selection character in IDT is usually set to _ KERNEL_CS. That is, the highest running level.

2: As described in C above: "The previous values of ss and esp are saved in the new stack. These values define the Logical Address of the stack associated with the old privileged level.", that ss, how can I find the previous esp values? It should be from TSS. when the interruption occurs, if the running level is detected to have been changed, save the values in the SS and ESP registers to the corresponding level position of the TSS. load the new SS and ESP values, then extract the old SS and ESP values from the TSS, and then press the stack.

3: Stack changes, as shown in:

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We can see that there are very few hardware environments automatically saved by the hardware. To restore the hardware to the previous environment after interruption, you also need to save more register values, this is done by the operating system. this can be seen in future code analysis.

After the interrupt and exception are processed, the corresponding handler must generate an iret command to forward control to the interrupted process, which forces the control unit:

1. Load the cs, eip, and eflag registers with the values stored in the stack. If a hardware error code has been pushed into the stack and on the eip content, the hardware error code must be displayed before executing the iret command.

2. Check whether the CPL of the processing program is equal to the low two values in cs. If yes, iret will terminate and return; otherwise, transfer to the next step.

3. The ss and esp registers are reprinted from the stack. Therefore, the stack associated with the old privileged level is returned.

4. check the content of ds, es, fs, and gs segment registers. If one register contains a segment descriptor and Its DPL value is smaller than CPL, clear the related segment registers. This is done by the control unit to prevent user-state programs from using the segment registers previously used by the kernel. If these registers are not cleared, malicious user programs will use them to access the kernel address space.

Note 4: give an example. if you enter the kernel state through the system call. then, assign the DS and ES values to _ KERNEL_DS (in the 2.4 kernel). After processing (after iret is called), restore the CS and EIP values, in this case, the CPL of CS is 3. because DS and ES are set to _ KERNEL_DS, the DPL value is 0. Therefore, the values of DS and ES must be cleared. in the 2.6 kernel, after an interruption or exception occurs, set the value of DS and ES to _ USER_DS, which avoids the above clearing process and improves the efficiency.

Iii. Important data structures

Before going deep into the source code, analyze the data structure used as follows:

Irq_desc [] is defined as follows:

Extern irq_desc_t irq_desc [NR_IRQS]

Typedef struct irq_desc {

Unsigned int status;/* IRQ status; whether IRQ is disabled, and whether the IRQ device is being automatically detected */

Hw_irq_controller * handler;/* pointer to an interrupt controller */

C * action;/* the interrupt handler hanging on IRQ */

Unsigned int depth;/* 0: This IRQ is enabled. If it is a positive number, it indicates it is disabled */

Unsigned int irq_count;/* Number of interruptions of the IRQ */

Unsigned int irqs_unhandled;/* Total Number of IRQ not processed on the IRQ line */

Spinlock_t lock;

}____ Cacheline_aligned irq_desc_t;

Hw_irq_controller is defined as follows:

Struct hw_interrupt_type {

Const char * typename;/* Name of the interrupt controller */

Unsigned int (* startup) (unsigned int irq);/* allows interruption from the IRQ line */

Void (* shutdown) (unsigned int irq);/* disable interruption from the IRQ line */

Void (* enable) (unsigned int irq);/* The enable and disable functions are the same as the startup shutdown functions in 8259A */

Void (* disable) (unsigned int irq );

Void (* ack) (unsigned int irq);/* generate a response on the IRQ line */

Void (* end) (unsigned int irq);/* called upon termination of the IRQ handler */

Void (* set_affinity) (unsigned int irq, cpumask_t dest);/* set the affinity of IRQ processing in the SMP system */

}

Typedef struct hw_interrupt_type hw_irq_controller;

Struct irqaction is defined as follows:

Struct irqaction {

// Interrupt Processing Routine

Irqreturn_t (* handler) (int, void *, struct pt_regs *);

// Flags:

// SA_INTERRUPT: interrupt nesting

// SA_SAMPLE_RANDOM: the interrupt is caused by physical randomness.

// SA_SHIRQ: disconnection sharing

Unsigned long flags;

// Useless on the x86 Platform

Cpumask_t mask;

// Name of the hardware that causes the interruption

Const char * name;

// Device ID, which is generally specified by the vendor

Void * dev_id;

// The next irqaction. During sharing, a disconnection usually corresponds to the Interrupt Processing Routine of many hardware devices.

Struct irqaction * next;

}

It can be used to indicate the relationship between the above data structures:

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