Nios ii--Experiment 4--key Interrupt Hardware section

Key interrupt Hardware Development new schematic diagram

1. Open Quartus II 11.0, create a new project, File--New project Wizard ..., ignore introduction, click between? Next> go to the next step. Set up engineering working directory, project name respectively. It is important to note that in the engineering work directory, please use English, do not include spaces, etc., or you may have problems when using the Nios II IDE later. Set as shown in 1. Then proceed to the next step. This project is named Lab3_bnt .

2, add the existing files, there is no need to add files, directly click? Next> go to the next step. For device setup. It's Cyclone IV family? EP4CE6E22C8 chip, select OK and go to the next step directly. EDA tool Setup, because the project does not carry out simulation, and so on, so do not set up, if you need to Modelsim simulation, in the simulation line, select tool Name? For Modelsim-altera (this is selected based on the version of Modelsim installed), Format (s) is selected as Verilog HDL (this is also selected based on the hardware description language mastered). Click? Next>?, go to the Summary (summary) page, and then click? Finish.

3, New? Block Diagram/schematic File? (Block diagram/schematic). Click? FILE-New: Select the Block diagram/schematic File in design files and click OK.

?

Qsys Calling Module

Referring to experiment two (LED), a PIO is added on the basis of the experiment to connect the external keys. Set as input, edge interrupt, rising edge trigger.

Set the port, rename the port name, and set the interrupt number.

After the add is complete, build.

Schematic Add IP module

2. Adding niosii Cores

   Double-click the empty space in BLOCK1.BDF to open the Symbol dialog box. Select Project

4. Add PLL

   Click Megawizard Plug-in Manager ... in the lower right corner to enter the macro module call interface.

   Select Creat a new custom megafunction variation, click? Next> go to the next step and add the name of the output file to the PLL after the "What name does want for the". Then search for ALTPLL in the search box on the right, select it, this step mainly for the system Add clock module, and then click? Next> into the next step.

   Popup altpll Settings dialog box, where? Where is the frequency of the inclk0 input? In the General section, change the clock to 50MHz.

   Then follow these procedures to set up:

   Then always set the default, always next to the window, click Finish.

   A quartus II IP Files dialog box pops up, click Yes to complete and no action is required. Then click OK in the Symbol dialog box and place the module in BLOCK1.BDF.

6. connecting, adding pins

   Double-click the Open Symbol dialog box, and2 in Name, and add the door.

   Click Select Module to add Pin, right click, select Generate pins for symbol ports.

   ?

   Rename the pin as follows:

8. Click? Project-add/remove files in Project ..., click the Browse button after the file name, select the. qsys file, click Add, and then click OK.
10. Configuration Pins

    First, compile, and then use the script file to configure, toolsàtcl scripts;

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22. Set up engineering parameters

    Set as configuration device EPCS4

    Set dual-use pins;

24. In general, please be patient for a long time.

Nios ii--Experiment 4--key Interrupt Hardware section