RH442-6Linux process scheduling

Linux process scheduling 1. Cache-primary storage structure 1. Advantages of Cache: the read/write speed of lCache can almost match with that of the CPU, greatly providing system access speed. The lCache capacity is relatively small than the primary storage, and the cost of the entire memory system has not increased much. 2. structured CPU...

Linux process scheduling
I. Cache-primary storage structure
1. Advantages of Cache:
L the read/write speed of the Cache can almost match the CPU, which can greatly provide the system access speed.
L The Cache capacity is relatively small than the primary storage, and the cost of the entire memory system has not increased much.
2. Structure
Data transmission between the CPU and the primary memory must be performed by the Cache controller. The Cache controller redirects data read/write requests from the CPU to the Cache memory. if the data is in the Cache, the CPU performs read/write operations on the Cache, which is called a hit. When hit, the CPU reads (writes) data from the Cache. Because the Cache speed matches the CPU speed, there is no need to insert the wait state, so the CPU is in the zero wait state, that is, the CPU and Cache have been synchronized. Therefore, the Cache is sometimes called a synchronous Cache; if the data is not in the Cache, the CPU performs an operation on the primary storage, which is called a failure. In case of failure, the CPU must be inserted with a waiting period of t w in its bus cycle.

II. basic Cache operations
1. read operations
When the CPU sends a read operation command, it must be divided into two types based on the primary storage address it generates: One is that the required data is already in the Cache storage, so you only need to directly access the Cache storage, reading information from the corresponding unit to the data bus; the other is that the required data has not been loaded into the Cache memory, while the CPU reads information from the main memory, the Cache replacement component copies the storage content of the address from the primary storage to the Cache. The word block stored in the Cache is a copy of the corresponding word block in the primary storage.
2. write operation
When the CPU sends a write operation command, it should also be divided into two types based on the main memory address it generates: first, when hit, not only should the new content be written into the Cache memory, you must Write data to the primary storage at the same time so that the content of the primary storage and Cache can be modified at the same time to ensure consistency between the primary storage and the copy content. this method is called Write-through or Write-through, for short ). Second, when there is no hit, many microcomputer systems only write information to the primary storage, and do not need to transfer the entire content in the primary storage where the address unit is located to the Cache storage at the same time.
 
III. address Image and method
The information exchange between the primary storage and the Cache is carried out in the form of data blocks. to transfer the information from the primary storage to the Cache, a function must be used to map the primary storage block to the Cache block, it is called an address image. After the information is loaded into the Cache based on this image relationship, the system should convert the master address to the Cache address when executing the program. this conversion process is called address transformation (because the Cache storage space is small, therefore, a block in the Cache must correspond to several blocks in the primary storage, that is, several primary blocks map to the same Cache block ). Address Image methods include direct image, fully connected image, and group connected image.
1. direct image
Advantages: easy to implement,
Disadvantage: it is not flexible enough. when the program accesses data in two conflicting blocks, the Cache hit rate decreases sharply.

 
2. fully connected Image
Advantage: Low Block conflict probability and high Cache utilization.
Disadvantages: the query speed of block tables in the Cache is slow. because of the high Cache speed requirements, all comparison and replacement strategies must be implemented by hardware. the control is complicated and difficult to implement.

 
3. associated images
The group connected Image method is a compromise between a fully connected image and a direct image. The group connected Image method is easier than the fully connected Image method in block hit and replacement algorithms. the probability of Block conflict is lower than that of the direct image method, and the hit rate is between the direct image and the fully connected image.

IV. Cache information query
1. Cache information
[Root @ www ~] # Getconf-a | grep-I cache
Levelpolicicache_size 32768 # Level 1 cache: 32KB
Levelpolicicache_assoc 8
Levelpolicicache_linesize 64
LEVEL1_DCACHE_SIZE 32768
LEVEL1_DCACHE_ASSOC 8
LEVEL1_DCACHE_LINESIZE 64
LEVEL2_CACHE_SIZE 6291456 # Level 2 cache: 6 MB
LEVEL2_CACHE_ASSOC 24
LEVEL2_CACHE_LINESIZE 64
LEVEL3_CACHE_SIZE 0
LEVEL3_CACHE_ASSOC 0
LEVEL3_CACHE_LINESIZE 0
LEVEL4_CACHE_SIZE 0
LEVEL4_CACHE_ASSOC 0
# Other viewing methods:
[Root @ www ~] # X86info-c
 
2. query the Cache hit rate
[Root @ www ~] # Valgrind -- tool = cachegrind -- I1 = 32768,8, 64 -- D1 = 32768,8, 64 -- L2 = 2097152,8, 64 cache2
= 12949 = Cachegrind, a cache and branch-prediction profiler
= 12949 = Copyright (C) 2002-2009, and gnu gpl 'd, by Nicholas Nethercote et al.
= 12949 = Using Valgrind-3.5.0 and LibVEX; rerun with-h for copyright info
= 12949 = Command: cache2
= 12949 =
Starting
Finished
= 12949 =
= 12949 = I refs: 6,188,124,129
==12949 = I1 misses: 633
= 12949 = L2i misses: 629
==12949 = I1 miss rate: 0.00%
= 12949 = L2i miss rate: 0.00%
= 12949 =
= 12949 = D refs: 3,937,851,911 (3,375,260,605 rd + 562,591,306 wr)
= 12949 = D1 misses: 562,500,831 (647 rd + 562,500,184 wr)
= 12949 = L2d misses: 35,162,671 (608 rd + 35,162,063 wr)
= 12949 = D1 miss rate: 14.2% (0.0% + 99.9%) # L1 loss rate
= 12949 = L2d miss rate: 0.8% (0.0% + 6.2%)
= 12949 =
= 12949 = L2 refs: 562,501,464 (1,280 rd + 562,500,184 wr)
= 12949 = L2 misses: 35,163,300 (1,237 rd + 35,162,063 wr)
= 12949 = L2 miss rate: 0.3% (0.0% + 6.2%) # L2 loss rate
 
# Cache usage analysis: # valgrind -- tool = cachegrind programm_name
# -- I1, -- D1, -- L2: cache matching cpu
 
V. Linux process scheduling
1. three scheduling methods for Linux kernel processes
L SCHED_OTHER: Time-based scheduling policy
L SCHED_FIFO: real-time scheduling policy, first served
L SCHED_RR: real-time scheduling policy, time slice rotation
 
# Real-time processes are called with priority. real-time processes determine the scheduling weight based on the real-time priority.
# The time-sharing process determines the value through nice and counter values. the smaller the nice, the larger the counter, the higher the scheduling probability. that is, the process that used the least cpu will receive priority scheduling.
 
2. all tasks adopt the SCHED_OTHER (time-based scheduling policy) scheduling policy.
L create a task and specify the time-based scheduling policy and the nice value (-20 ~ 19 ).
L The execution time (counter) on the cpu is determined based on the nice value of each task ).
L if no resource is waiting, add the task to the ready queue.
L The scheduler traverses the tasks in the ready queue. by calculating the dynamic priority of each task (counter + 20-nice) result, the scheduler selects the largest one to run, when the time slice is used up (counter is reduced to 0) or the cpu is voluntarily abandoned, the task will be placed at the end of the ready queue (the time slice is used up) or wait queue (cpu is abandoned due to waiting for resources).
L at this time, the scheduler repeats the above calculation process and goes to step 2.
L when the scheduler finds that the weights calculated by all ready tasks are not greater than 0, repeat step 1.
 
3. all tasks adopt the FIFO scheduling (real-time scheduling policy, first come first served) policy.
L specify the FIFO when creating a process and set the real-time priority rt_priority (1-99 ).
L if no resource is waiting, add the task to the ready queue.
L The scheduler traverses the ready queue and calculates the scheduling weight (1000 + rt_priority) based on the real-time priority. the tasks with the highest selection value use the cpu, this FIFO task will occupy the cpu until a higher priority task is ready (even if the priority is the same) or voluntarily give up (waiting for resources ).
L The scheduler finds that a task with a higher priority arrives (a task with a higher priority may be interrupted or awakened by a timer task, or by a running task ), the scheduler immediately saves all the data of the current cpu register in the current task stack, and re-loads the register data from the stack of the high-priority task to the cpu. at this time, the high-priority task starts to run. Repeat step 1.
L if the current task voluntarily gives up the cpu usage right because it is waiting for resources, the task will be deleted from the ready queue and added to the waiting queue. at this time, repeat step 1.
 
4. when all tasks adopt SCHED_RR (real-time scheduling policy, time slice rotation) scheduling policy
L when creating a task, specify the scheduling parameter as RR and set the real-time priority and nice value of the task (the nice value will be converted to the length of the time slice of the task ).
L if no resource is waiting, add the task to the ready queue.
L The scheduler traverses the ready queue and calculates the scheduling weight (1000 + rt_priority) based on the real-time priority. the task with the highest selection value uses the cpu.
L if the RR task time slice in the ready queue is 0, the time slice of the task is set based on the nice value, and the task is placed at the end of the ready queue. Repeat step 3.
L if the current task actively exits the cpu because it is waiting for resources, it is added to the waiting queue. Repeat step 3.
 
5. SCHED_OTHER, SCHED_RR, and SCHED_FIFO scheduling
L RR scheduling and FIFO scheduling are real-time processes. the time-based scheduling process is non-real-time.
L when the real-time process is ready, if the current cpu is running a non-real-time process, the real-time process immediately preemptible non-real-time process.
L RR and FIFO processes both adopt real-time priority as the scheduling weight standard, and RR is an extension of FIFO. In FIFO, if the two processes have the same priority, which of the two processes with the same priority is determined by the unknown in the queue, this leads to some unfairness (the priority is the same, why keep you running ?), If the scheduling policies of two jobs with the same priority are set to RR, the two jobs can be executed cyclically and fairly.
 
6. Comparison between SHCED_RR time slice rotation scheduling and SCHED_FIFO scheduling
L differences:
Ø when the time slice of the process adopting the SHCED_RR policy is used up, the system will re-allocate the time slice and place it at the end of the ready queue. Putting it at the end of the queue ensures fair scheduling for all RR tasks with the same priority.
Ø once SCHED_FIFO occupies the cpu, it will continue to run. Run until a higher-priority task arrives or you give up.
If a real-time process with the same priority (the scheduling weights calculated based on the priority are the same) is ready, the task with the same priority can be run only after the process voluntarily gives up in FIFO mode. RR allows each task to be executed for a period of time.
L similarities:
Both RR and FIFO are only used for real-time tasks.
The priority is greater than 0 (1-99) during creation ).
Perform the scheduling based on the preemption priority scheduling algorithm.
Ø ready real-time tasks can immediately seize non-real-time tasks.
 
VI. process scheduling settings
1. view the scheduling policies and priorities of processes.
[Root @ www ~] # Chrt-p pid
[Root @ www ~] # Chrt-p 29441
Pid 29441's current scheduling policy: SCHED_OTHER
Pid 29441's current scheduling priority: 0
# Process scheduling method: SCHED_OTHER
# Priority: the default priority is 0.
 
[Root @ www ~] # Ps axo pid, comm, rtprio, plicy
PID COMMAND RTPRIO POL
1 init-TS
2 migration/0 99 FF
3 ksoftirqd/0-TS
4 watchdog/0 99 FF
5 migration/1 99 FF
6 ksoftirqd/1-TS
# Static process scheduling priority: 1-99 SCHED_FIFO (SF real-time scheduling policy, first come first served) and SCHED_RR (SR real-time scheduling policy, time round robin)
# Priority of dynamic process scheduling: 100-139 SCHED_OTHER (ST time-based scheduling policy)
 
2. set and adjust process scheduling and priority
L SCHED_FIFO: # chrt-f [1-99]/path/to/prog arguments
[Root @ www ~] # Chrt-f 80 ping 192.168.32.221 &
[Root @ www ~] # Chrt-p 13490
Pid 13490's current scheduling policy: SCHED_FIFO
Pid 13490's current scheduling priority: 80
 
L SCHED_RR: # chrt-r [1-99]/path/to/prog arguments
[Root @ www ~] # Chrt-r 80 ping 192.168.32.221 &
[Root @ www ~] # Chrt-p 13490
Pid 13490's current scheduling policy: SCHED_RR
Pid 13490's current scheduling priority: 80
 
L SCHED_OTHER: # nice or renice
[Root @ www ~] # Renice-10-p 13464
13464: old priority 0, new priority-10