Zedboard (2) use Vivado + SDK to develop embedded applications -- Instance 1, zedboardvivado

Zedboard (2) use Vivado + SDK to develop embedded applications -- Instance 1, zedboardvivado

This article introduces how to use Vivado to build the Zedboard development board hardware platform + SDK development application (Zedboard bare metal Development)

The process is as follows:

1. Run Vivado to create a new project

Specify the Project path. Next, select the RTL Project and check "Do not specify sources at this time" (Do not add source files and pin constraints first)

　　

Next, select the corresponding development Board, select the Board, and select Zedboard XXXX.

　　　

The last page displays information about the new project:

　　

Click finish.

2. Add the processor zynq-7000 (IP) Kernel

　　Choose Flow Navigator> IP Intergrstor> Create Block Design on the left-side menu bar.

　　

Fill in the name and select the folder (actually the Sources)

　　

Click the Add IP plus sign on the Development page and enter a keyword to search for the IP core to be added.

　　

After the IP core is selected, the IP core is displayed in the graphic interface:

　　

Click Run Block Automation in the green strip.

　　

Select apply board preset, map the input/output signals related to the IP core to the specific pins of the chip, and add necessary constraints.

Click OK to start automation. The result is as follows:

　　

Double-click the IP core in the figure (the image turns orange) to change its internal configuration.

M_AXI_GP0 is enabled by default. You can connect the IP address of the PL part with the AXI interface to the PS for control. We do not need to use the PL section for the time being, so we disable it. Otherwise, an error will be reported during design verification. Double-click the square, see

　　

After the configuration is complete, right-click the pattern and select "Validate Design" to check the rules.

　　

If there is no error, the following prompt appears:

　　

　　The next step is to generate the output file and encapsulate it in the form of HDL.

Generate a comprehensive, implementation, and simulation file for the added modules. Click Flow Navigator> IP Intergrstor> Generator Block Design.

　　

　　

After an output file is generated, it is encapsulated into a top-level HDL file. In the Source window, right-click the core (name of the added IP core) and select Create HDL Wrapper.

　　

After completion, the Source window has an additional HDL file Core_wrapper.v

　　

So far, we have completed the internal design of an IP core and encapsulated it into a basic form of HDL (which can be called as a module by other designs ), then you can perform RTL analysis, synthesis, implementation, and generation of hardware bit stream files.

　　Next, we will generate a bit stream file:

In the left-side Navigation Pane, Flow Navigator-> Program and Debug-> Generate Bitstream. If the integration and implementation are not done before, the system will prompt whether to proceed. Click yes.

　　

 

3. Use the SDK for software development

In the previous step, we have completed the design of the hardware architecture of the processor. If the bit stream file is downloaded to the ZYNQ-7000 chip, the chip will be a custom processor, but it still lacks software programs.

In this section, we import hardware platform information to the SDK

Open the project core and select IMPLEMENTATION (this step is required, otherwise an error will be reported later)

Next, File-> Exprot Hardware for SDK, import all Hardware platform information and Hardware bit files to the SDK platform, and open the SDK software (after opening the SDK, The system. hdf is)

　　

Check to add a bit stream file.

　　

After the generation is complete, the hardware platform is built. The next step is to go to the SDK for application software development.

File-> Launch SDK, the SDK starts to run.

On the left pane, you can see that the hardware platform information has been imported.

　　

　　The next step is to create a BSP (board-level driver package) and an Application Project (Application)

BSP is an essential component for running programs on the hardware platform. In the SDK, choose File> New> Board Support Package.

* Standalone for bare metal Development

After you click finish, the configuration information of the newly created BSP is displayed:

　　

Click OK.

Next, create an application project. In the SDK, select File> New>Application Project

　　

Name and select information, and then click Next,

　　

Select Hello World as the project template and Finish. In this case, the project folder just created appears in the project browser on the left. Find helloworld. c In the drop-down menu src, and double-click it to edit it.

　　

Edit the code, click Save, and compile

　　

Check the compilation report on the console. If no error occurs, the compilation is successful. Next, you can connect to the Zedboard for board-level debugging.

 

4. board-level debugging

　　After the application is compiled and compiled successfully, the next step is to connect the PC and Zedboard for debugging.

First, two Micro-USB cables are required to connect J14 (UART) and J17 (JTAG), as shown in.

　　

The functions of J14 and J17 interfaces are described below:

(1) J14 is a USB to UART serial port, which is used to output the information of the Board (for example, the simplest is to output the "Hello World" statement, to connect to this line, it can be displayed on the SDK Console)

J17 is the USB-JTAG Configuration Port, used to configure Board information

After the wires are connected, ground all the hop cap JP7-11 (in JTAG mode), as shown in:

　　

Turn ON the Zedboard power, turn ON the power switch ON, and view the port through the "Device Manager" of the PC.

　　

Be sure to identify which COM port is UART, which will be used later.

Go back to the SDK, right-click the project lidar-> Run As-> Run deployments

　　

Double-click Xilinx C/C ++ application (GDB). "project name Debug" is displayed. Select the STDIO Connection page on the right.

Check "connect STDIO xxxx" and select the COM number corresponding to the UART (for example, my Port is COM4) from the drop-down menu. Set the value below to 115200. Click Apply and Close.

　　

After the settings are complete, we can start board-level debugging. click the button on the menu bar to enter the Run model (of course, clicking Run directly after you Apply above is also the same effect)

* If debugging is required step by step, click the button to enter the Debug mode.

* You may be prompted that FPGA is not configured. skip this step.

You can view the output through the Console.

So far, a simple application is complete.

The entire process involves the following phases:

1. Build a hardware platform (in vivado)

2. Import hardware platform information (including bit stream files) to the SDK

3. Create a driver package and an application project in the SDK

4. Connect the PC and the Development Board for board-level debugging.