A brief explanation of the dm3730 xload Startup Process

Source: Internet
Author: User

I am confused with the xload startup problem mentioned in the previous blog post. I carefully read this article and learned some xload startup processes from the Internet.
Starting from the internal fireware to start xload, xload first loads the x-load.lds:
[Html]
OUTPUT_FORMAT ("elf32-littlearm", "elf32-littlearm", "elf32-littlearm ")
OUTPUT_ARCH (arm)
ENTRY (_ start)
SECTIONS
{
. = 0x00000000;
 
. = ALIGN (4 );
. Text:
{
Cpu/omap3/start. o (. text)
* (. Text)
}
 
. = ALIGN (4 );
. Rodata: {* (. rodata )}
 
. = ALIGN (4 );
. Data: {* (. data )}
 
. = ALIGN (4 );
. Got: {* (. got )}
 
. = ALIGN (4 );
_ Bss_start = .;
. Bss: {* (. bss )}
_ End = .;
}
From the text code segment of this code, we can see that the ENTRY of the ENTRY function is the start function, which is located at cpu/omap3/start. s, this part of the code completes the Assembly and C language interaction, part of the code is as follows:
[Html]
. Globl _ start
_ Start:
B reset <span style = "color: # FF6666;"> <span style = "color: # FF0000;"> // jump to the reset function first, no return </span>
Ldr pc, _ hang
......
 
_ Hang:
. Word do_hang

. Word 0x12345678
. Word 0x12345678
. Word 0x12345678
. Word 0x12345678
. Word 0x12345678
. Word 0x12345678
. Word 0x12345678/* now 16*4 = 64 */
 
. Global _ end_vect
_ End_vect:
 
. Balignl 16, 0 xdeadbeef
/*
**************************************** *********************************
*
* Startup Code (reset vector)
*
* Do important init only if we don't start from memory!
* Setup Memory and board specific bits prior to relocation.
* Relocate armboot to ram
* Setup stack
*
**************************************** *********************************
*/
 
_ TEXT_BASE:
. Word TEXT_BASE
 
. Globl _ armboot_start
_ Armboot_start:
. Word _ start
 
/*
* These are defined in the board-specific linker script.
*/
. Globl _ bss_start
_ Bss_start:
. Word _ bss_start
 
. Globl _ bss_end
_ Bss_end:
. Word _ end
 
/*
* The actual reset code
*/
 
Reset:
/*
* Set the cpu to SVC32 mode
*/
.......
Next:
......
 
Bl cpy_clk_code/* put dpll adjust code behind vectors */<span style = "color: # FF0000;"> // complete clk initialization </span>

/* The mask ROM code shoshould have PLL and others stable */
Bl cpu_init_crit <span style = "color: # FF0000;"> // This part is the key to solving my problem. The C language content is called here. </Span>
 
Relocate:/* relocate U-Boot to RAM */
............
 
Copy_loop:
.........
/* Set up the stack */
Stack_setup:
Ldr r0, _ TEXT_BASE/* upper 128 KiB: relocated uboot */
Sub sp, r0, #128/* leave 32 words for abort-stack */
And sp, sp ,#~ 7/* 8 byte alinged for (ldr/str) d */
 
/* Clear BSS (if any). Is below tx (watch load addr-need space )*/
Clear_bss:
Ldr r0, _ bss_start/* find start of bss segment */
Ldr r1, _ bss_end/* stop here */
Mov r2, #0x00000000/* clear value */
Clbss_l:
Str r2, [r0]/* clear BSS location */
Cmp r0, r1/* are we at the end yet */
Add r0, r0, #4/* increment clear index pointer */
Bne clbss_l/* keep clearing till at end */
 
Ldr pc, _ start_armboot/* jump to C code */<span style = "color: # FF0000;"> // you can load uboot in C language. bin </span>,
<Span style = "color: # FF0000; background-color: rgb (255,255,255);"> of course, the serial port Initialization is completed here </span> <span style = "color: # FF0000; background-color: rgb (255,255,255); ">. Therefore, the system information can be printf only at this time. </span>
_ Start_armboot:. word start_armboot
 
 
/*
**************************************** *********************************
*
* CPU_init_critical registers
*
* Setup important registers
* Setup memory timing
*
**************************************** *********************************
*/
Cpu_init_crit: <span style = "color: # FF0000;"> // cpu initialization, which must be completed before xload starts uboot </span>
/*
* Invalidate L1 I/D
*/
Mov r0, #0/* set up for MCR */
Mcr p15, 0, r0, c8, c7, 0/* invalidate TLBs */
Mcr p15, 0, r0, c7, c5, 1/* invalidate icache */
 
/* Invalide L2 cache (gp device call point)
*-Warning, this may have issues on EMU/HS devices
* This call can just upt r0-r5
*/
Mov r12, #0x1 @ set up to invalide L2
Smi:. word 0xE1600070 @ Call SMI monitor
 
/*
* Disable MMU stuff and caches
*/
............
# Ifndef CONFIG_ICACHE_OFF
Orr r0, r0, #0x00001800 @ set bit 11,12 (--- I z ---) BTB, I-Cache
# Endif
Mcr p15, 0, r0, c1, c0, 0
 
/*
* Jump to board specific initialization... The Mask ROM will have already initialized
* Basic memory. Go here to bump up clock rate and handle wake up conditions.
*/
............
Bl lowlevel_init/* go setup pll, mux, memory */<span style = "color: # FF0000;"> // This is important and is the core of my problem, this will jump into another assembly file.
In platform. s
{
<Span style = "color: #000000;">. globl lowlevel_init
Lowlevel_init:
Ldr sp, SRAM_STACK
Str ip, [sp]/* stash old link register */
Mov ip, lr/* save link reg using SS call */
Bl s_init/* go setup pll, mux, memory */<span style = "color: # FF0000;"> // here BL jumps into the C language omap3530beagle. c, so the call here is relatively concealed, is the interaction between Assembly and C
Generally, after compilation, the unsolved symbol table of the function is formed and the exported symbol table. Different compilers and Languages form different symbol formats. Complete the program link in the Link phase. Of course, this is a static process.) </span>
Ldr ip, [sp]/* restore save ip */
Mov lr, ip/* restore link reg */
 
/* Back to arch calling code */
Mov pc, lr
 
/* The literal pools origin */
. Ltorg
...} </Span>
 
Mov lr, ip/* restore link */
Mov pc, lr/* back to my caller */
/*
* Exception handler
*/
. Align 5
Do_hang:
Ldr sp, _ TEXT_BASE/* use 32 words abort stack */
Bl hang/* hang and never return */
<Span style = "color: # FF0000;"> // This is a reflection of the exception in this Assembly. It jumps into the hang function in C language. </Span>
The s_init function is shown below:
[Html]
Int s_init (int skip)
{
U32 rev;
 
Rev = get_cpu_rev ();
 
Watchdog_init ();
Try_unlock_sram ();
MuxSetupAll ();
Delay (100 );
Prcm_init ();
Config_3430sdram_ddr ()
.......
Return (0 );
}
This is also a problem I didn't see at first, because it is reasonable that this part must be prior to the start_armboot function of board. c. After all, it is the initialization of CPU, watchdog, and sdram.
In the config_3430sdram_ddr function, the sdram size is identified as follows:
[Html]
If (beagle_revision () = REVISION_XM ){
If (identify_xm_ddr () = MICRON_DDR ){
_ Raw_writel (0x2, SDRC_CS_CFG);/* 256 MB/bank */
_ Raw_writel (sdp_sdrc_md1__0_ddr_micron_xm, SDRC_MCFG_0 );
_ Raw_writel (sdp_sdrc_md1__0_ddr_micron_xm, SDRC_MCFG_1 );
_ Raw_writel (MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_0 );
_ Raw_writel (MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_0 );
_ Raw_writel (MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_1 );
_ Raw_writel (MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_1 );
_ Raw_writel (SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_0 );
_ Raw_writel (SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_1 );
} Else {
_ Raw_writel (0x4, SDRC_CS_CFG);/* 512 MB/bank */
_ Raw_writel (sdp_sdrc_md1__0_ddr_numonyx_xm, SDRC_MCFG_0 );
_ Raw_writel (sdp_sdrc_md1__0_ddr_numonyx_xm, SDRC_MCFG_1 );
_ Raw_writel (NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0 );
_ Raw_writel (NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0 );
_ Raw_writel (NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1 );
_ Raw_writel (NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1 );
_ Raw_writel (SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0 );
_ Raw_writel (SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1 );
}
} Else {
_ Raw_writel (0x1, SDRC_CS_CFG);/* 128 MB/bank */
_ Raw_writel (sdp_sdrc_md1__0_ddr, SDRC_MCFG_0 );
_ Raw_writel (sdp_sdrc_md1__0_ddr, SDRC_MCFG_1 );
_ Raw_writel (MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0 );
_ Raw_writel (MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0 );
_ Raw_writel (MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1 );
_ Raw_writel (MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1 );
_ Raw_writel (SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0 );
_ Raw_writel (SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1 );
}
[Html]
Beagle_revision () = REVISION_XM
This code is very important and also a bug, because the value returned by the previous function returns 2 If the patch is missing, and the default value is 0. Of course, the M sdram configuration is not performed.
In conclusion, the reason why xload cannot be started properly in the early stage is that it is not in the start_armboot function. The subsequent programs cannot run properly because the system has not properly initialized the sdram. Therefore, REVSION_XM = 2 is the best solution.

 

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