2017335 project development record 10_28335 SCI module

Ipv335 has three internal SCI modules: SCIA, SCIB, and SCIC. Each SCI module has a receiver and transmitter. Each SCI receiver and transmitter has a 16-level FIFO (FirstInFirstOut first-in-first-out) queue, they all have their own independent enable bit and interrupt bit; can work in half duplex or full duplex mode; 28335 SCI module 1. Introduction

Ipv335 has three internal SCI modules: SCIA, SCIB, and SCIC.

Each SCI module has a receiver and transmitter. Each SCI receiver and transmitter has a 16-level FIFO (First In First Out) queue, they all have their own independent enable bit and interrupt bit; they can work in half-duplex or full-duplex mode;

Three methods of serial communication:

2. in-depth SCI

A. GPIO pins correspond to the following:

Available for two groups: GPIO28/29 and GPIO35/36.;

SCIB has four groups of pins to choose from: O9/11, GPIO14/15, GPIO18/19, and GPIO22/23;

The corresponding SCIC is GPIO62/63.

During programming initialization, you must first configure the corresponding GPIO pins to the SCI mode to enable these pins to have the SCI function;

B. The data character with format information in SCI communication is frame. Below is a typical data frame format.

C. The following describes the SCI baud rate setting registers SCIHBAUD and SCILBAUD. 0-15 are high-byte and low-byte connections, forming a 16-bit baud rate setting register BRR.

BRR = SCIHBAUD + SCILBAUD

If 1 <= BRR <= 65535, then the SCI baud rate = LSPCLK/(BRR + 1) * 8), you can bring the expected baud rate, obtain the BRR value;

If BRR = 0, then the SCI baud rate = LSPCLK/16

D. Principles of Data sending and receiving by the SCI module:

3. SCI serial port programming

A. first initialize the IO pin (take SCI-A as an example, SCI-B, SCI-C initialization method is the same, is to change the corresponding pin on the line)

Void InitSciaGpio () // initialize the GPIO pin of SCIA as an example {EALLOW; // decide which group of GPIO28/29 and GPIO35/36 are used according to the hardware design. Here we use 35/36 as an example // define the pin as the upper-pull GpioCtrlRegs. GPBPUD. bit. GPIO36 = 0; GpioCtrlRegs. GPBPUD. bit. GPIO35 = 0; // defines the pin as an asynchronous input GpioCtrlRegs. GPBQSEL1.bit. GPIO36 = 3; // Configure the pin as the SCI function pin GpioCtrlRegs. GPBMUX1.bit. GPIO36 = 1; GpioCtrlRegs. GPBMUX1.bit. GPIO35 = 1; EDIS ;}

B. SCI initialization configuration

Void scia_init () {SciaRegs. SCICCR. all = 0x0007; // 1 stop bit, No loopback // No parity, 8 char bits, // async mode, idle-line protocol SciaRegs. SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK, // Disable rx err, SLEEP, TXWAKE SciaRegs. SCICTL2.bit. TXINTENA = 1; // message interruption enabling SciaRegs. SCICTL2.bit. RXBKINTENA = 1; // receives the interruption to enable SciaRegs. sciadeud = 0x0001; // 9600 baud @ LSPCLK = 37.5 MHz. sciaRegs. SCILBAUD = 0x00E7; SciaRegs. SCICTL1.all = 0x0023; // Relinquish SCI from Reset}

C. configure the interrupt.

EALLOW;    // This is needed to write to EALLOW protected registers   PieVectTable.SCIRXINTA = &sciaRxIsr;   PieVectTable.SCITXINTA = &sciaTxIsr;   PieVectTable.SCIRXINTB = &scibRxIsr;   PieVectTable.SCITXINTB = &scibTxIsr;EDIS;   // This is needed to disable write to EALLOW protected registers

D. connect the interrupt service programs of SCIA and SCIB to the interrupt table of PIE. if the interrupt occurs, it will go to your ISR. the interrupt is as follows:

 PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block   PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, int1   PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9, INT2   PieCtrlRegs.PIEIER9.bit.INTx3=1;     // PIE Group 9, INT3   PieCtrlRegs.PIEIER9.bit.INTx4=1;     // PIE Group 9, INT4   IER = 0x100;    // Enable CPU INT   EINT;

In this way, the serial port is basically OK.

The following is a complete SCI routine, an example of echoback: