Comprehensive Analysis of clock Processing Mechanism in Linux (1)

In Linux, many activities are related to time, such as process scheduling and network processing. Therefore, understanding the clock processing mechanism in the Linux operating system helps to better understand the operating methods of the Linux operating system. This article analyzes the clock Processing Mechanism of Linux 2.6.25 kernel, first introduces some hardware timers in computer systems, then, it focuses on the hardware clock and Software Clock processing processes in the Linux operating system and the application of software clock. Finally, the full text is summarized.

◆ 1. Timer in Computer System

There are many hardware timers in computer systems, such as Real Timer Clock RTC), Time Stamp Counter TSC) and Programmable Interval Timer PIT.

This part of content is not the point of this article. Here is a few simple introductions. For more information, see references:

• Real Timer Clock RTC ):
  • Independent from the entire computer system, such as CPU and other chips)
  • The kernel uses it to obtain the current system time and date.
• Time Stamp Counter TSC ):
  • From Pentium, a register TSC is provided to accumulate the clock signals generated by each external oscillator.
  • Run the rdtsc command to access this register.
  • TSC provides more accurate time measurement than PIT
• Programmable Interval Timer PIT ):
  • Time Measuring Device
  • The kernel uses a device that generates clock interruptions, and the generated clock interruptions depend on the hardware architecture, which is slow for 10 MS once, fast for 1 MS once
• High Precision Event Timer HPET ):
  • The replacement of PIT and RTC, compared with the previous timer, HPET provides a higher clock frequency of at least 10 MHz) and a wider counter width of 64 bits)
  • An HPET includes a counter with a fixed frequency value increase and 3 to 32 independent timers, each of which contains a comparator and a register to save a value, indicates the time when the interruption is triggered ). Each comparator compares the value in the counter with the value in the register. When the two values are equal, an interruption occurs.