Processor: The number of the logical processing cores in the system. For single-core processors. The class thinks it is its CPU number, and for multicore processors it can be a physical core or a virtual logical kernel using Hyper-threading technology.
VENDOR_ID:CPU Manufacturers
CPU FAMILY:CPU Product Family Code
Model:cpu belongs to which generation in its series
Model NAME:CPU belongs to the name and its number, the nominal frequency
Stepping:cpu belongs to the production update version number
CPU MHZ:CPU The actual use of the main frequency
Cache Size:cpu Level Two buffer size
Physical ID: The label of a single CPU
Siblings: Number of logical physical cores for a single CPU
Core ID: The number of the current physical core in which the CPU is located, which is not necessarily sequential
CPU Cores: The physical core number of the CPU at which the logical core is located
Apicid: A number used to distinguish between different logical cores. This number must be different for each logical core in the system. This number is not necessarily contiguous
FPU: Whether it has a floating point unit (floating)
Fpu_exception: Whether floating point calculation exceptions are supported
CPUID level: Before running the CPUID command. EAX the value in the register, depending on the value of the CPUID instruction will return different content
WP: Indicates whether the current CPU supports write protection of user space in kernel state (write Protection)
Flags: Features currently supported by the CPU
Bogomips: A roughly measured CPU speed when the system kernel boots (Million instructions Per Second)
Clflush size: per-flush cache
Cache_alignment: Cache Address Alignment Units
Address sizes: Number of accessible addresses space
Power Management: Support for energy management, there are several optional support features:
Ts:temperature sensor
Fid:frequency ID Control
Vid:voltage ID Control
Ttp:thermal Trip
Tm:
Stc:
100mhzsteps:
Hwpstate:
CPU information in the flags of the meaning:
Fpu:onboard (x87) floating point Unit
Vme:virtual Mode Extension
De:debugging Extensions
Pse:page Size Extensions
Tsc:time Stamp Counter:support for RDTSC and WRTSC instructions
Msr:model-specific Registers
Pae:physical Address extensions:ability to access 64GB of memory; Only 4GB can is accessed at a time though
Mce:machine Check Architecture
CX8:CMPXCHG8 instruction
Apic:onboard Advanced Programmable Interrupt Controller
Sep:sysenter/sysexit instructions; Sysenter is used for jumps to kernel memory during system calls, and Sysexit are used for Jumps:back to the user code
Mtrr:memory Type Range Registers
Pge:page Global Enable
Mca:machine Check Architecture
Cmov:cmov instruction
Pat:page Attribute Table
Pse36:36-bit Page Size extensions:allows to map 4 MB pages into the first 64GB RAM, used with PSE.
Pn:processor Serial-number; Only available on Pentium 3
Clflush:clflush instruction
Dtes:debug Trace Store
ACPI:ACPI via MSR
Mmx:multimedia Extension
Fxsr:fxsave and fxstor Instructions
Sse:streaming SIMD Extensions. Single instruction multiple data. Lets you does a bunch of the same operation on different pieces of input:in a single clock tick.
Sse2:streaming SIMD Extensions-2. More of the same.
SELFSNOOP:CPU self Snoop
Acc:automatic Clock Control
IA64:IA-64 processor Itanium.
Ht:hyperthreading. Introduces an imaginary second processor that doesn ' t does much but lets you run threads in the same process a bit quicker.
Nx:no Execute bit. Prevents arbitrary code running via buffer overflows.
Pni:prescott New Instructions aka. SSE3
Vmx:intel Vanderpool Hardware Virtualization Technology
SVM:AMD "Pacifica" Hardware virtualization Technology
LM: "Long Mode," which means the chip supports the AMD64 instruction set
TM: "Thermal Monitor" Thermal throttling with IDLE instructions. Usually hardware controlled in response to CPU temperature.
TM2: "Thermal Monitor 2″decrease speed by reducing multipler and VCore.
EST: "Enhanced SpeedStep"
Descriptive narrative of Linux/proc/cpuinfo documents