Detailed LINUX-I2C Drive __linux

DirectoryFirst, LINUXI2C Drive--Overview
1.1 Written in front
1.2 I2C
1.3 Hardware
1.4 Software
1.5 reference two, LINUXI2C drive--I2C bus
2.1 I2C Bus Physical structure
2.2 I2C Bus Features
2.3 Start and stop conditions
2.4 Data transmission Format
2.5 response
2.6 Bus arbitration three, LINUXI2C drive--analysis of EEPROM reading and writing
3.1 Overview
3.2 Device Address
3.3 Read EEPROM
3.4 Writing EEPROM
Iv. LINUXI2C Drive--starting with two examples of access to EEPROM
4.1 Access to I2C devices via Sysfs file system
4.2 Access to I2C devices via DEVFS
4.3 Summary
LINUXI2C Drive--A brief talk on LINUXI2C drive architecture
5.1 I2C Architecture
5.2 I2C Important data structure
Six, LINUXI2C drive--I2C device driver
6.1 EEPROM board Level equipment Resources
I2C device driver for 6.2 at24c01a EEPROM
6.2.1 At24_driver
6.2.2 At24probe ()/At24remove ()
6.2.3 At24binread ()
6.2.4 At24binwrite ()
6.3 Summary
Seven, LINUXI2C drive--I2C bus driver
7.1 Samsung S5PV210 I2C Adapter Hardware description
7.2 I2C Bus-driven load/unload
7.3 I2C bus-driven probe
7.4 Start I2C transmission
7.5 to propel the transmission of I2C by interruption
7.6 Summary
First, LINUXI2C Drive--Overview 1.1 written in front

I am a student, not before the detailed contact with the Linux driver, just read Song Baohua "Linux device Driver Development detailed", this period of time want to calm down to study the Linux I2C Drive, find a lot of information on the Internet, the predecessors wrote the article I benefited, but the beginning is really very painful, Basically everyone is from the Linux I2C architecture of the three major components: I2C core, I2C bus driver, I2C device driver, good abstraction. So I want to write this article, from a new perspective to share My Learning Linux I2C drive experience, write the wrong place to welcome criticism.

Because the Linux device model is not very familiar with, so I follow how to implement a I2C transmission to tell, for the platform bus, equipment and the bus to match the temporary neglect.

Of course, a lot of things I have been from the Internet, but also please forgive me. I will put some useful blog links behind, I hope to be useful to everyone. 1.2 I2C

The I2C bus is a two-wire serial bus developed by Philips, which is a clock line (SCL) and bi-directional data cable (SDA). Because the I2C bus requires only two lines, less space is used on the circuit board, and the problem is that the bandwidth is narrower. I2C in standard mode, the highest transmission rate 100kb/s, in the fast mode of up to 400kb/s. belongs to half duplex.

In embedded systems, I2C is widely used, and most microcontrollers integrate the I2C bus, which is typically used to communicate with Rtc,eeprom, smart battery circuits, sensors, LCDs, and other similar devices. 1.3 Hardware

Development Board: Fei Ling OK210

CPU Model: Samsung s5pv210

EEPROM Model: at24c01a

1.4 Software

Linux version: Linux 2.6.35.7

I2C bus driver: drivers/i2c/busses/i2c-s3c2410.c

EEPROM drive: drivers/misc/eeprom/at24.c 1.5 reference "Linux device Driver development detailed" Song Baohua http://blog.csdn.net/liaozc/article/details /6655015 Zechin's Column http://www.linxh.blog.chinaunix.net/uid/25445243/sid-179653-list-1.html Hui Hui 308 http:// Www.linuxidc.com/Linux/2011-11/47651.htm Linux Community Author: cjok376240497 http://www.embedu.org/Column/Column190.htm Author: Teacher Liu, huaqing visionary embedded college lecturer. Http://www.linuxidc.com/Linux/2013-10/91993p14.htm Linux Community Author: Zhao Chunjiang II, LINUXI2C drive--I2C bus

This section analyzes the I2C bus protocol, because my development board is a Samsung S5PV210 chip, so take this as an example. 2.1 I2C Bus Physical Structure

The I2C bus is very simple on a physical connection, consisting of a SDA (serial data cable) and an SCL (serial clock line) and a pull resistor. The principle of communication is to generate the signals required by the I2C bus protocol to transmit data by controlling the order of the SCL and SDA lines. When the bus is idle, the two wires are generally pulled up by the upper pull resistor above, maintaining a high level. 2.2 I2C bus characteristics each device connected to the bus can be configured to address multiple host buses via a unique address and the existence of a simple host/system, and if two or more hosts simultaneously initiate data transmission, it can be prevented from being corrupted by arbitration. Serial 8-bit two-way data transmission standard mode transmission rate for 100KBITS/S fast mode transmission rate of 400KBITS/S 7-bit address mode support host, host, from the machine, from the machine 2.3 start and stop conditions

When the SCL is high, the SDA line is switched from a high level to a low level, indicating the beginning; When the SCL is high, the SDA line is switched from a low level to a high level to indicate a stop. As shown in the following figure.

2.4 Data transmission Format

Each byte sent to the SDA line must be 8 bits, and the number of bytes per transmission can be unlimited, but each byte must be followed by a response bit.

2.5 Response

Data transmission must be in response, response clock pulse generated by the host, on the SCL of the 9th Clock Pulse, the first 8 clock pulses to transmit 8-bit, 1byte data.

When the sender receives the response clock pulse, it pulls the SDA to release the SDA line, and the receiver ends by pulling down the SDA first to indicate that the data is received, that is, SDA keep the low level during the response.

2.6 Bus Arbitration

Arbitration is required when two hosts compete on the bus.

SDA line low level priority is higher than the high level. When a host first produces a low level, and then another host to generate a high level, but because the low level of priority higher than the high level, so the bus into a low level, that is, send a low level of host bus and send a high level of the host does not occupy the bus. If two hosts are sending low levels, then continue to compare the next clock cycle level to determine who owns the bus, and so on.

Third, LINUXI2C Drive--analysis of EEPROM reading and writing

This section introduces the reading and writing sequence of EEPROM, referring to AT24C01A's datasheet. 3.1 Overview

The storage size of at24c01a is 1K, and the page size is 8 bytes.

3.2 Device Address

7-bit address, the first four is 1010, after three bits by the chip pin, from the schematic diagram known three digits is 000, that is, the device address for 0x50, because the data transmission is 8, the last decision is read or write. 3.3 Read EEPROM

Read the data from any address EEPROM, first byte must be first in the SDA on the device address of the EEPROM, that is, 0x50, and the last of the 8-bit data is a low-level representation of the device, and then the second byte is to read the data in the EEPROM address, so that after the start of the condition, The third byte emits the device address on the SDA, at this time the last one is high level, represents the reading device, the fourth byte data is reads the EEPROM the corresponding address the data.

You can see, read the EEPROM requires two starting conditions, that is, 2 messages, the first message to write the EEPROM to determine the location of the reading, the size of 2 bytes, the second message is true to read the EEPROM. 3.4 Writing EEPROM

Write EEPROM is relatively simple, just a starting condition, the first byte emitted device address and the lowest bit for the low level of the write EEPROM, the second byte issued to read the data in the Eerpom address, the third byte read the corresponding address in the EEPROM data four, LINUXI2C driver--Starting with two examples of accessing the EEPROM

This section describes two ways to access the EEPROM in the Linux application tier and makes it easy to understand the sample code. The first method is to access the EEPROM through the Sysfs file system, and the second method is accessed through the device file of the EEPROM. The two methods correspond to two different implementations of the I2C device driver, which are analyzed in detail later in this summary. 4.1 access to I2C devices via Sysfs file system

EEPROM device driver in the/sys/bus/i2c/devices/0-0050/directory to map the EEPROM device to a binary node, the file name is EEPROM. The EEPROM file is read and written to the EEPROM.

We can first look at the contents of the EEPROM with the Cat command.

[root@forlinx210]# cat EEPROM                                                                      
X

Found inside are garbled, and then use the Echo command to the string "test" input to the EEPROM file, and then cat out.

You will find that the string test already exists in the EEPROM, we know that the Sysfs file system after power loss, and can not save the data, in order to verify that the "test" string stored in the EEPROM, you can power off the system restart, and then cat EEPROM, You will find that test still exists, proving that the EEPROM was actually written.

Of course, because the EEPROM has been mapped to a file, we can also use the file I/O write application to do a simple access test. For example, the following program writes specific data (Hi,this is a eepromtest!) to a specific address (0x40), and then reads the written data on this address.

 #include <stdio.h> #include <stdlib.h>