First knowledge of SPI bus protocol for Linux bus drivers with cainiao

I still remember that the first time I used the SPI device was my junior summer vacation. At that time, I bought a wireless module with my teammates and used a single-chip microcomputer for wireless transmission, but the code was not written by myself, although this function was implemented, I still had no idea about SPI at the time. Senior, I felt ashamed to ask how to use SPI flash. Later, he sent me a piece of flash, and then I used 51 to refer to the implementation on the Internet to know that there was such a thing. After that, the company gradually used some SPI devices, such as flash, codec, and ads7843, and gradually became familiar with this stuff.

In fact, the bus protocol is defined manually to reduce Io ports. We can also define the Protocol as long as we follow this sequence.

SPI (serial peripheral interface) is a serial peripheral device interface. She is a high-speed, full-duplex, synchronous communication bus with only four lines. Cainiao, high speed should be well understood, that is, the transmission rate is relatively fast, and there may be no concept about full duplex or synchronization. There are a few examples on the Internet. Full Duplex means that data can be received while sending data. The two are synchronized, as if we call each other at ordinary times, when talking, you can also hear the other party's voice. Half Duplex: the so-called half duplex refers to the occurrence of only one action in a period of time. For example, a narrow road can only have one vehicle passing through at the same time. When two vehicles are currently on the road, in this case, only one vehicle is allowed to pass first, and the other vehicle will be available after the head. Ticket communication refers to the transmission of data on the communication line in a single direction, just like a pager. Synchronous transmission means that both parties have a common clock reference and can send and receive data accurately through the clock reference. Generally, this clock reference is a synchronous clock line or the same clock source. Asynchronous transmission means that the communication parties do not share a common clock reference. Generally, each time data is sent and received, a forward code is required for rate synchronization. Computer Parallel Port is synchronous, and RS-232 serial port and USB is asynchronous.

SPI is a ring bus structure consisting of SS (CS), sck, SDI, and SDO. It is controlled by sck, and two shift registers are used for data exchange.

Send at the rising edge, receive at the falling edge, and send at the High Level first

When the rising edge arrives, the SDO level will be sent to the register of the slave device.

When the descent edge arrives, the level on SDI will be received to the register of the master device.

Assume that the host and slave are ready for initialization: And the sbuff of the host is 0xaa (10101010), and The sbuff of the slave is 0x55 (01010101 ), next we will demonstrate the data of the eight clock cycles of SPI step by step (assuming that the data is sent on the rising edge ).

---------------------------------------------------

Pulse host sbuff slave sbuff SDI SDO

---------------------------------------------------

0 00-0 10101010 01010101 0 0

---------------------------------------------------

1 0-1 0101010x10101011 0 1

1 1--0 01010100 10101011 0 1

---------------------------------------------------

2 0--1 1010100x01010110 1 0

2 1--0 10101001 01010110 1 0

---------------------------------------------------

3 0--1 0101001x10101101 0 1

3 1--0 01010010 10101101 0 1

---------------------------------------------------

4 0-1 1010010x01011010 1 0

4 1--0 10100101 01011010 1 0

---------------------------------------------------

5 0--1 0100101x10110101 0 1

5 1--0 01001010 10110101 0 1

---------------------------------------------------

6 0--1 1001010x01101010 1 0

6 1--0 10010101 01101010 1 0

---------------------------------------------------

7 0--1 0010101x11010101 0 1

7 1--0 00101010 11010101 0 1

---------------------------------------------------

8 0--1 0101010x10101010 1 0

8 1--0 01010101 10101010 1 0

---------------------------------------------------

In this way, the eight-bit switching of the two registers is completed. The 0-1 above indicates the rising edge, 1-0 indicates the falling edge, SDI,
SDO is relative to the host. According to the above analysis, a complete transmission cycle is 16 bits, that is, two bytes, because the host must first send commands and then prepare data from the host based on the host name, the Host reads the data back in the next 8-bit clock cycle.

The SPI bus is a three-line synchronous interface launched by Motorola. It supports Synchronous Serial 3-line communication: A clock sck and a data input line MoSi (Master
Output slave input), one data output miso (Master input slave output ). The main features of SPI include: it can send and receive serial data at the same time; it can work as a host or slave machine; it provides a frequency programmable clock; it can send an end interrupt sign; write conflict protection; bus competition protection.

The SPI bus works in four ways (spi0, spi1, spi2, and SPI3). Generally, we use the spi0 and SPI3 modes.

In order to exchange data with peripherals, the SPI module can output serial synchronization clock polarity and phase according to the working requirements of peripherals. The clock polarity (cpol) has no significant impact on the transmission protocol, if cpol = 0, the idle status of the serial synchronization clock is low. If cpol = 1, the idle status of the serial synchronization clock is high. The Clock Phase (cpha) can be used to select one of two different transmission protocols for data transmission. If cpha is set to 0, data in the first hop (up or down) of the serial synchronization is sampled. If cpha is set to 1, data in the second hop (up or down) of the serial synchronization clock is sampled.

Let's take a look at some images on the Internet:

 

It is clear that the difference between the sampling time when cpol is 0 and 1 and when cpha is 0 and 1, respectively.

However, in general, the mode 0 is used, and I use the mode 0.

 

This is the time series. When the SPI device is selected, data is being transmitted, and data is transmitted at a clock sampling time. In general, it is quite simple.

Let's take a look at the SPI internal structure.

 

Remember that the output of the host is the input of the slave, and the input of the host is the output of the slave. Cross-join like a serial port.

OK. This is recorded for the SPI protocol and will be enough for future driver implementations.